ehci_pci.c revision 1.60 
1/*	$NetBSD: ehci_pci.c,v 1.60 2015/07/15 03:54:53 msaitoh Exp $	*/
2
3/*
4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart@augustsson.net).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.60 2015/07/15 03:54:53 msaitoh Exp $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/device.h>
39#include <sys/proc.h>
40#include <sys/queue.h>
41
42#include <sys/bus.h>
43
44#include <dev/pci/pcidevs.h>
45#include <dev/pci/pcivar.h>
46#include <dev/pci/usb_pci.h>
47
48#include <dev/usb/usb.h>
49#include <dev/usb/usbdi.h>
50#include <dev/usb/usbdivar.h>
51#include <dev/usb/usb_mem.h>
52
53#include <dev/usb/ehcireg.h>
54#include <dev/usb/ehcivar.h>
55
56#ifdef EHCI_DEBUG
57#define DPRINTF(x)	if (ehcidebug) printf x
58extern int ehcidebug;
59#else
60#define DPRINTF(x)
61#endif
62
63enum ehci_pci_quirk_flags {
64	EHCI_PCI_QUIRK_AMD_SB600 = 0x1,	/* always need a quirk */
65	EHCI_PCI_QUIRK_AMD_SB700 = 0x2,	/* depends on the SMB revision */
66};
67
68static const struct pci_quirkdata ehci_pci_quirks[] = {
69	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_EHCI,
70	    EHCI_PCI_QUIRK_AMD_SB600 },
71	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_EHCI,
72	    EHCI_PCI_QUIRK_AMD_SB700 },
73};
74
75static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
76				   pcitag_t tag);
77static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
78			       pcitag_t tag);
79static bool ehci_pci_suspend(device_t, const pmf_qual_t *);
80static bool ehci_pci_resume(device_t, const pmf_qual_t *);
81
82struct ehci_pci_softc {
83	ehci_softc_t		sc;
84	pci_chipset_tag_t	sc_pc;
85	pcitag_t		sc_tag;
86	void 			*sc_ih;		/* interrupt vectoring */
87};
88
89static int ehci_sb700_match(const struct pci_attach_args *pa);
90static int ehci_apply_amd_quirks(struct ehci_pci_softc *sc);
91enum ehci_pci_quirk_flags ehci_pci_lookup_quirkdata(pci_vendor_id_t,
92	pci_product_id_t);
93
94#define EHCI_MAX_BIOS_WAIT		100 /* ms*10 */
95#define EHCI_SBx00_WORKAROUND_REG	0x50
96#define EHCI_SBx00_WORKAROUND_ENABLE	__BIT(27)
97
98
99static int
100ehci_pci_match(device_t parent, cfdata_t match, void *aux)
101{
102	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
103
104	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
105	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
106	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
107		return 1;
108
109	return 0;
110}
111
112static void
113ehci_pci_attach(device_t parent, device_t self, void *aux)
114{
115	struct ehci_pci_softc *sc = device_private(self);
116	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
117	pci_chipset_tag_t pc = pa->pa_pc;
118	pcitag_t tag = pa->pa_tag;
119	char const *intrstr;
120	pci_intr_handle_t ih;
121	pcireg_t csr;
122	usbd_status r;
123	int ncomp;
124	struct usb_pci *up;
125	int quirk;
126	char intrbuf[PCI_INTRSTR_LEN];
127
128	sc->sc.sc_dev = self;
129	sc->sc.sc_bus.hci_private = sc;
130
131	pci_aprint_devinfo(pa, "USB controller");
132
133	/* Check for quirks */
134	quirk = ehci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
135					   PCI_PRODUCT(pa->pa_id));
136
137	/* Map I/O registers */
138	if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
139			   &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
140		sc->sc.sc_size = 0;
141		aprint_error_dev(self, "can't map memory space\n");
142		return;
143	}
144
145	sc->sc_pc = pc;
146	sc->sc_tag = tag;
147	sc->sc.sc_bus.dmatag = pa->pa_dmat;
148
149	/* Disable interrupts, so we don't get any spurious ones. */
150	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
151	DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs));
152	EOWRITE4(&sc->sc, EHCI_USBINTR, 0);
153
154	/* Handle quirks */
155	switch (quirk) {
156	case EHCI_PCI_QUIRK_AMD_SB600:
157		ehci_apply_amd_quirks(sc);
158		break;
159	case EHCI_PCI_QUIRK_AMD_SB700:
160		if (pci_find_device(NULL, ehci_sb700_match))
161			ehci_apply_amd_quirks(sc);
162		break;
163	}
164
165	/* Enable the device. */
166	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
167	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
168		       csr | PCI_COMMAND_MASTER_ENABLE);
169
170	/* Map and establish the interrupt. */
171	if (pci_intr_map(pa, &ih)) {
172		aprint_error_dev(self, "couldn't map interrupt\n");
173		goto fail;
174	}
175
176	/*
177	 * Allocate IRQ
178	 */
179	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
180	sc->sc_ih = pci_intr_establish(pc, ih, IPL_SCHED, ehci_intr, sc);
181	if (sc->sc_ih == NULL) {
182		aprint_error_dev(self, "couldn't establish interrupt");
183		if (intrstr != NULL)
184			aprint_error(" at %s", intrstr);
185		aprint_error("\n");
186		return;
187	}
188	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
189
190	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
191	case PCI_USBREV_PRE_1_0:
192	case PCI_USBREV_1_0:
193	case PCI_USBREV_1_1:
194		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
195		aprint_verbose_dev(self, "pre-2.0 USB rev\n");
196		return;
197	case PCI_USBREV_2_0:
198		sc->sc.sc_bus.usbrev = USBREV_2_0;
199		break;
200	default:
201		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
202		break;
203	}
204
205	/* Figure out vendor for root hub descriptor. */
206	sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
207	pci_findvendor(sc->sc.sc_vendor,
208	    sizeof(sc->sc.sc_vendor), sc->sc.sc_id_vendor);
209	/* Enable workaround for dropped interrupts as required */
210	switch (sc->sc.sc_id_vendor) {
211	case PCI_VENDOR_ATI:
212	case PCI_VENDOR_VIATECH:
213		sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
214		aprint_normal_dev(self, "dropped intr workaround enabled\n");
215		break;
216	default:
217		break;
218	}
219
220	/*
221	 * Find companion controllers.  According to the spec they always
222	 * have lower function numbers so they should be enumerated already.
223	 */
224	const u_int maxncomp = EHCI_HCS_N_CC(EREAD4(&sc->sc, EHCI_HCSPARAMS));
225	KASSERT(maxncomp <= EHCI_COMPANION_MAX);
226	ncomp = 0;
227	TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
228		if (up->bus == pa->pa_bus && up->device == pa->pa_device
229		    && !up->claimed) {
230			DPRINTF(("ehci_pci_attach: companion %s\n",
231				 device_xname(up->usb)));
232			sc->sc.sc_comps[ncomp++] = up->usb;
233			up->claimed = true;
234			if (ncomp == maxncomp)
235				break;
236		}
237	}
238	sc->sc.sc_ncomp = ncomp;
239
240	ehci_get_ownership(&sc->sc, pc, tag);
241
242	r = ehci_init(&sc->sc);
243	if (r != USBD_NORMAL_COMPLETION) {
244		aprint_error_dev(self, "init failed, error=%d\n", r);
245		goto fail;
246	}
247
248	if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume,
249	                          ehci_shutdown))
250		aprint_error_dev(self, "couldn't establish power handler\n");
251
252	/* Attach usb device. */
253	sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
254	return;
255
256fail:
257	if (sc->sc_ih) {
258		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
259		sc->sc_ih = NULL;
260	}
261	if (sc->sc.sc_size) {
262		ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
263		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
264		sc->sc.sc_size = 0;
265	}
266	return;
267}
268
269static int
270ehci_pci_detach(device_t self, int flags)
271{
272	struct ehci_pci_softc *sc = device_private(self);
273	int rv;
274
275	rv = ehci_detach(&sc->sc, flags);
276	if (rv)
277		return rv;
278
279	pmf_device_deregister(self);
280	ehci_shutdown(self, flags);
281
282	/* disable interrupts */
283	EOWRITE4(&sc->sc, EHCI_USBINTR, 0);
284	/* XXX grotty hack to flush the write */
285	(void)EOREAD4(&sc->sc, EHCI_USBINTR);
286
287	if (sc->sc_ih != NULL) {
288		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
289		sc->sc_ih = NULL;
290	}
291	if (sc->sc.sc_size) {
292		ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
293		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
294		sc->sc.sc_size = 0;
295	}
296
297#if 1
298	/* XXX created in ehci.c */
299	mutex_destroy(&sc->sc.sc_lock);
300	mutex_destroy(&sc->sc.sc_intr_lock);
301
302	softint_disestablish(sc->sc.sc_doorbell_si);
303	softint_disestablish(sc->sc.sc_pcd_si);
304#endif
305
306	return 0;
307}
308
309CFATTACH_DECL3_NEW(ehci_pci, sizeof(struct ehci_pci_softc),
310    ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL,
311    ehci_childdet, DVF_DETACH_SHUTDOWN);
312
313#ifdef EHCI_DEBUG
314static void
315ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
316{
317	uint32_t cparams, legctlsts, addr, cap, id;
318	int maxdump = 10;
319
320	cparams = EREAD4(sc, EHCI_HCCPARAMS);
321	addr = EHCI_HCC_EECP(cparams);
322	while (addr != 0) {
323		cap = pci_conf_read(pc, tag, addr);
324		id = EHCI_CAP_GET_ID(cap);
325		switch (id) {
326		case EHCI_CAP_ID_LEGACY:
327			legctlsts = pci_conf_read(pc, tag,
328			    addr + PCI_EHCI_USBLEGCTLSTS);
329			printf("ehci_dump_caps: legsup=0x%08x "
330			       "legctlsts=0x%08x\n", cap, legctlsts);
331			break;
332		default:
333			printf("ehci_dump_caps: cap=0x%08x\n", cap);
334			break;
335		}
336		if (--maxdump < 0)
337			break;
338		addr = EHCI_CAP_GET_NEXT(cap);
339	}
340}
341#endif
342
343static void
344ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
345{
346	const char *devname = device_xname(sc->sc_dev);
347	uint32_t cparams, addr, cap;
348	pcireg_t legsup;
349	int maxcap = 10;
350
351	cparams = EREAD4(sc, EHCI_HCCPARAMS);
352	addr = EHCI_HCC_EECP(cparams);
353	while (addr != 0) {
354		cap = pci_conf_read(pc, tag, addr);
355		if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
356			goto next;
357		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
358		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
359		    legsup & ~EHCI_LEG_HC_OS_OWNED);
360
361next:
362		if (--maxcap < 0) {
363			aprint_normal("%s: broken extended capabilities "
364				      "ignored\n", devname);
365			return;
366		}
367		addr = EHCI_CAP_GET_NEXT(cap);
368	}
369}
370
371static void
372ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
373{
374	const char *devname = device_xname(sc->sc_dev);
375	uint32_t cparams, addr, cap;
376	pcireg_t legsup;
377	int maxcap = 10;
378	int ms;
379
380#ifdef EHCI_DEBUG
381	if (ehcidebug)
382		ehci_dump_caps(sc, pc, tag);
383#endif
384	cparams = EREAD4(sc, EHCI_HCCPARAMS);
385	addr = EHCI_HCC_EECP(cparams);
386	while (addr != 0) {
387		cap = pci_conf_read(pc, tag, addr);
388		if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
389			goto next;
390		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
391		if (legsup & EHCI_LEG_HC_BIOS_OWNED) {
392			/* Ask BIOS to give up ownership */
393			pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
394			    legsup | EHCI_LEG_HC_OS_OWNED);
395			for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
396				legsup = pci_conf_read(pc, tag,
397				    addr + PCI_EHCI_USBLEGSUP);
398				if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
399					break;
400				delay(10000);
401			}
402			if (ms == EHCI_MAX_BIOS_WAIT) {
403				aprint_normal("%s: BIOS refuses to give up "
404				    "ownership, using force\n", devname);
405				pci_conf_write(pc, tag,
406				    addr + PCI_EHCI_USBLEGSUP, 0);
407			} else
408				aprint_verbose("%s: BIOS has given up "
409				    "ownership\n", devname);
410		}
411
412		/* Disable SMIs */
413		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0);
414
415next:
416		if (--maxcap < 0) {
417			aprint_normal("%s: broken extended capabilities "
418				      "ignored\n", devname);
419			return;
420		}
421		addr = EHCI_CAP_GET_NEXT(cap);
422	}
423
424}
425
426static bool
427ehci_pci_suspend(device_t dv, const pmf_qual_t *qual)
428{
429	struct ehci_pci_softc *sc = device_private(dv);
430
431	ehci_suspend(dv, qual);
432	ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
433
434	return true;
435}
436
437static bool
438ehci_pci_resume(device_t dv, const pmf_qual_t *qual)
439{
440	struct ehci_pci_softc *sc = device_private(dv);
441
442	ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
443	return ehci_resume(dv, qual);
444}
445
446static int
447ehci_sb700_match(const struct pci_attach_args *pa)
448{
449	if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI &&
450	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SB600_SMB))
451		return 0;
452
453	switch (PCI_REVISION(pa->pa_class)) {
454	case 0x3a:
455	case 0x3b:
456		return 1;
457	}
458
459	return 0;
460}
461
462static int
463ehci_apply_amd_quirks(struct ehci_pci_softc *sc)
464{
465	pcireg_t value;
466
467	aprint_normal_dev(sc->sc.sc_dev,
468	    "applying AMD SB600/SB700 USB freeze workaround\n");
469	value = pci_conf_read(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG);
470	pci_conf_write(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG,
471	    value | EHCI_SBx00_WORKAROUND_ENABLE);
472
473	return 0;
474}
475
476enum ehci_pci_quirk_flags
477ehci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product)
478{
479	int i;
480
481	for (i = 0; i < __arraycount(ehci_pci_quirks); i++) {
482		if (vendor == ehci_pci_quirks[i].vendor &&
483		    product == ehci_pci_quirks[i].product)
484			return ehci_pci_quirks[i].quirks;
485	}
486	return 0;
487}
488
489