1/* $NetBSD: mx98905.c,v 1.18 2024/05/21 07:29:40 andvar Exp $ */ 2 3/*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/* 34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 35 * adapters. 36 * 37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 38 * 39 * Copyright (C) 1993, David Greenman. This software may be used, modified, 40 * copied, distributed, and sold, in both source and binary form provided that 41 * the above copyright and these terms are retained. Under no circumstances is 42 * the author responsible for the proper functioning of this software, nor does 43 * the author assume any responsibility for damages incurred with its use. 44 */ 45 46/* 47 * Special routines for the Macronix MX 98905. For use with the "ne" driver. 48 */ 49 50/* 51 * <URL:http://mail-index.NetBSD.org/port-arm32/1996/06/23/0005.html>: 52 * There are 2 types of etherh card. One uses the macronics chipset MX98905 53 * and that chipset has a bug in it, in that it the MSB remote DMA 54 * register does not work. There is a workaround for this which 55 * should be around soon. In fact, I think only the buffer ram test 56 * ever transfers more than 256 bytes across the DMA channel, so disabling 57 * it will make the mx stuff work. 58 */ 59 60#include <sys/param.h> 61 62__KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.18 2024/05/21 07:29:40 andvar Exp $"); 63 64#include <sys/device.h> 65#include <sys/mbuf.h> 66#include <sys/socket.h> 67#include <sys/syslog.h> 68#include <sys/systm.h> 69 70#include <net/if.h> 71#include <net/if_ether.h> 72#include <net/if_media.h> 73 74#include <sys/bus.h> 75 76#include <dev/ic/dp8390reg.h> 77#include <dev/ic/dp8390var.h> 78#include <dev/ic/ne2000reg.h> 79#include <dev/ic/ne2000var.h> 80#include <dev/ic/mx98905var.h> 81 82#ifndef __BUS_SPACE_HAS_STREAM_METHODS 83#define bus_space_write_stream_2 bus_space_write_2 84#define bus_space_write_multi_stream_2 bus_space_write_multi_2 85#define bus_space_read_multi_stream_2 bus_space_read_multi_2 86#endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 87 88static inline void mx98905_write_setup(struct dp8390_softc *, int, int); 89static inline void mx98905_write_wait(struct dp8390_softc *); 90 91void 92mx98905_attach(struct dp8390_softc *sc) 93{ 94 95 sc->ring_copy = mx98905_ring_copy; 96 sc->write_mbuf = mx98905_write_mbuf; 97 sc->read_hdr = mx98905_read_hdr; 98} 99 100static inline void 101mx98905_write_setup(struct dp8390_softc *sc, int len, int buf) 102{ 103 bus_space_tag_t nict = sc->sc_regt; 104 bus_space_handle_t nich = sc->sc_regh; 105 106 /* Select page 0 registers. */ 107 NIC_BARRIER(nict, nich); 108 bus_space_write_1(nict, nich, ED_P0_CR, 109 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 110 NIC_BARRIER(nict, nich); 111 112 /* Reset remote DMA complete flag. */ 113 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 114 NIC_BARRIER(nict, nich); 115 116 /* Set up DMA byte count. */ 117 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 118 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 119 120 /* Set up destination address in NIC mem. */ 121 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 122 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 123 124 /* Set remote DMA write. */ 125 NIC_BARRIER(nict, nich); 126 bus_space_write_1(nict, nich, 127 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 128 NIC_BARRIER(nict, nich); 129} 130 131 132static inline void 133mx98905_write_wait(struct dp8390_softc *sc) 134{ 135 int maxwait = 100; /* about 120us */ 136 bus_space_tag_t nict = sc->sc_regt; 137 bus_space_handle_t nich = sc->sc_regh; 138 139 /* 140 * Wait for remote DMA to complete. This is necessary because on the 141 * transmit side, data is handled internally by the NIC in bursts, and 142 * we can't start another remote DMA until this one completes. Not 143 * waiting causes really bad things to happen - like the NIC wedging 144 * the bus. 145 */ 146 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 147 ED_ISR_RDC) && --maxwait) { 148 bus_space_read_1(nict, nich, ED_P0_CRDA1); 149 bus_space_read_1(nict, nich, ED_P0_CRDA0); 150 NIC_BARRIER(nict, nich); 151 DELAY(1); 152 } 153 154 if (maxwait == 0) { 155 log(LOG_WARNING, 156 "%s: remote transmit DMA failed to complete\n", 157 device_xname(sc->sc_dev)); 158 dp8390_reset(sc); 159 } 160} 161 162/* 163 * Write an mbuf chain to the destination NIC memory address using programmed 164 * I/O. 165 */ 166int 167mx98905_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf) 168{ 169 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 170 bus_space_tag_t nict = sc->sc_regt; 171 bus_space_handle_t nich = sc->sc_regh; 172 bus_space_tag_t asict = nsc->sc_asict; 173 bus_space_handle_t asich = nsc->sc_asich; 174 int savelen, dmalen, resid, len; 175 u_int8_t *data, savebyte[2]; 176 int l, leftover; 177#ifdef DIAGNOSTIC 178 u_int8_t *lim; 179#endif 180 int i; 181 182 resid = savelen = m->m_pkthdr.len; 183 184 dmalen = uimin(resid, 254); 185 186 mx98905_write_setup(sc, dmalen, buf); 187 188 buf += dmalen; 189 resid -= dmalen; 190 191 /* 192 * Transfer the mbuf chain to the NIC memory. NE2000 cards 193 * require that data be transferred as words, and only words, 194 * so that case requires some extra code to patch over odd-length 195 * mbufs. 196 */ 197 /* NE2000s are a bit trickier. */ 198 /* Start out with no leftover data. */ 199 leftover = 0; 200 savebyte[0] = savebyte[1] = 0; 201 202 for (; m != 0; m = m->m_next) { 203 l = m->m_len; 204 if (l == 0) 205 continue; 206 data = mtod(m, u_int8_t *); 207#ifdef DIAGNOSTIC 208 lim = data + l; 209#endif 210 while (l > 0) { 211 if (leftover) { 212 /* 213 * Data left over (from mbuf or 214 * realignment). Buffer the next 215 * byte, and write it and the leftover 216 * data out. 217 */ 218 savebyte[1] = *data++; 219 l--; 220 bus_space_write_stream_2(asict, asich, 221 NE2000_ASIC_DATA, *(u_int16_t *)savebyte); 222 dmalen -= 2; 223 leftover = 0; 224 } else if (BUS_SPACE_ALIGNED_POINTER(data, 225 u_int16_t) == 0) { 226 /* Unaligned data; buffer the next byte. */ 227 savebyte[0] = *data++; 228 l--; 229 leftover = 1; 230 } else { 231 /* 232 * Aligned data; output contiguous 233 * words as much as we can, then 234 * buffer the remaining byte, if any. 235 */ 236 len = uimin(l, dmalen); 237 leftover = len & 1; 238 len &= ~1; 239 bus_space_write_multi_stream_2(asict, 240 asich, NE2000_ASIC_DATA, 241 (u_int16_t *)data, len >> 1); 242 dmalen -= len; 243 data += len; 244 if (leftover) 245 savebyte[0] = *data++; 246 l -= len + leftover; 247 } 248 if (dmalen == 0 && resid > 0) { 249 mx98905_write_wait(sc); 250 dmalen = uimin(resid, 254); 251 252 mx98905_write_setup(sc, dmalen, buf); 253 254 buf += dmalen; 255 resid -= dmalen; 256 } 257 } 258 if (l < 0) 259 panic("mx98905_write_mbuf: negative len"); 260#ifdef DIAGNOSTIC 261 if (data != lim) 262 panic("mx98905_write_mbuf: data != lim"); 263#endif 264 } 265 if (leftover) { 266 savebyte[1] = 0; 267 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 268 *(u_int16_t *)savebyte); 269 } 270 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 271 for(i = 0; i < (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1; 272 i++) 273 bus_space_write_stream_2(asict, asich, 274 NE2000_ASIC_DATA, 0); 275 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 276 } 277 NIC_BARRIER(nict, nich); 278 279 mx98905_write_wait(sc); 280 281 return (savelen); 282} 283 284/* 285 * Given a source and destination address, copy 'amount' of a packet from 286 * the ring buffer into a linear destination buffer. Takes into account 287 * ring-wrap. 288 */ 289int 290mx98905_ring_copy(struct dp8390_softc *sc, int src, void *vdst, u_short amount) 291{ 292 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 293 uint8_t *dst = vdst; 294 bus_space_tag_t nict = sc->sc_regt; 295 bus_space_handle_t nich = sc->sc_regh; 296 bus_space_tag_t asict = nsc->sc_asict; 297 bus_space_handle_t asich = nsc->sc_asich; 298 u_short tmp_amount; 299 int useword = nsc->sc_useword; 300 301 /* Does copy wrap to lower addr in ring buffer? */ 302 if (src + amount > sc->mem_end) { 303 tmp_amount = sc->mem_end - src; 304 305 /* Copy amount up to end of NIC memory. */ 306 mx98905_readmem(nict, nich, asict, asich, src, 307 (u_int8_t *)dst, tmp_amount, useword); 308 309 amount -= tmp_amount; 310 src = sc->mem_ring; 311 dst += tmp_amount; 312 } 313 314 mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword); 315 316 return (src + amount); 317} 318 319void 320mx98905_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr) 321{ 322 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 323 324 mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 325 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 326 nsc->sc_useword); 327#if BYTE_ORDER == BIG_ENDIAN 328 hdr->count = bswap16(hdr->count); 329#endif 330} 331 332static inline void 333mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich, 334 int len, int buf) 335{ 336 337 /* Select page 0 registers. */ 338 NIC_BARRIER(nict, nich); 339 bus_space_write_1(nict, nich, ED_P0_CR, 340 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 341 NIC_BARRIER(nict, nich); 342 343 /* Set up DMA byte count. */ 344 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 345 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 346 347 /* Set up source address in NIC mem. */ 348 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 349 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 350 351 NIC_BARRIER(nict, nich); 352 bus_space_write_1(nict, nich, ED_P0_CR, 353 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 354 355 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 356 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 357} 358 359/* 360 * Given a NIC memory source address and a host memory destination address, 361 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 362 * rounded up to a word - ok as long as mbufs are word sized. 363 */ 364void 365mx98905_readmem(bus_space_tag_t nict, bus_space_handle_t nich, bus_space_tag_t asict, bus_space_handle_t asich, int src, u_int8_t *dst, size_t amount, int useword) 366{ 367 int len, resid; 368 369 resid = amount; 370 /* Round up to a word. */ 371 if (resid & 1) 372 ++resid; 373 374 while (resid > 0) { 375 len = uimin(resid, 254); 376 mx98905_read_setup(nict, nich, len, src); 377 if (useword) 378 bus_space_read_multi_stream_2(asict, asich, 379 NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1); 380 else 381 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 382 dst, len); 383 resid -= len; 384 src += len; 385 dst += len; 386 } 387} 388