1/*	$NetBSD$	*/
2/*	$OpenBSD: if_maloreg.h,v 1.15 2007/10/08 22:08:12 mglocker Exp $ */
3
4/*
5 * Copyright (c) 2007 Marcus Glocker <mglocker@openbsd.org>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20#define MALO_REG_INT_CODE			0x00000C14
21/* From host to ARM */
22#define MALO_REG_H2A_INTERRUPT_EVENTS		0x00000C18
23
24/* bit definitions for MALO_REG_H2A_INTERRUPT_CAUSE */
25#define MALO_H2ARIC_BIT_PPA_READY		0x00000001
26#define MALO_H2ARIC_BIT_DOOR_BELL		0x00000002 /* bit 1 */
27#define MALO_H2ARIC_BIT_PS			0x00000004
28#define MALO_H2ARIC_BIT_PSPOLL			0x00000008 /* bit 3 */
29
30/* From ARM to host */
31#define MALO_REG_A2H_INTERRUPT_CAUSE		0x00000C30
32#define MALO_REG_A2H_INTERRUPT_MASK		0x00000C34
33#define MALO_REG_A2H_INTERRUPT_CLEAR_SEL	0x00000C38
34#define MALO_REG_A2H_INTERRUPT_STATUS_MASK	0x00000C3C
35
36/* bit definitions for MALO_REG_A2H_INTERRUPT_CAUSE */
37#define MALO_A2HRIC_BIT_TX_DONE			0x00000001	/* bit 0 */
38#define MALO_A2HRIC_BIT_RX_RDY			0x00000002	/* bit 1 */
39#define MALO_A2HRIC_BIT_OPC_DONE		0x00000004
40#define MALO_A2HRIC_BIT_MAC_EVENT		0x00000008
41#define MALO_A2HRIC_BIT_RX_PROBLEM		0x00000010
42#define MALO_A2HRIC_BIT_RADIO_OFF		0x00000020	/* bit 5 */
43#define MALO_A2HRIC_BIT_RADIO_ON		0x00000040
44#define MALO_A2HRIC_BIT_RADAR_DETECT		0x00000080
45#define MALO_A2HRIC_BIT_ICV_ERROR		0x00000100
46#define MALO_A2HRIC_BIT_MIC_ERROR		0x00000200	/* bit 9 */
47#define MALO_A2HRIC_BIT_QUEUE_EMPTY		0x00000400
48#define MALO_A2HRIC_BIT_QUEUE_FULL		0x00000800
49#define MALO_A2HRIC_BIT_CHAN_SWITCH		0x00001000
50#define MALO_A2HRIC_BIT_TX_WATCHDOG		0x00002000
51#define MALO_A2HRIC_BIT_BA_WATCHDOG		0x00004000
52
53#define MALO_ISR_SRC_BITS			\
54	(MALO_A2HRIC_BIT_RX_RDY |		\
55	 MALO_A2HRIC_BIT_TX_DONE |		\
56	 MALO_A2HRIC_BIT_OPC_DONE |		\
57	 MALO_A2HRIC_BIT_MAC_EVENT |		\
58	 MALO_A2HRIC_BIT_MIC_ERROR |		\
59	 MALO_A2HRIC_BIT_ICV_ERROR |		\
60	 MALO_A2HRIC_BIT_RADAR_DETECT |		\
61	 MALO_A2HRIC_BIT_CHAN_SWITCH |		\
62	 MALO_A2HRIC_BIT_TX_WATCHDOG |		\
63	 MALO_A2HRIC_BIT_QUEUE_EMPTY)
64#define MALO_ISR_RESET				(1<<15)
65
66#define MALO_A2HRIC_BIT_MASK			MALO_ISR_SRC_BITS
67
68/* map to 0x80000000 on BAR1  */
69#define MALO_REG_GEN_PTR			0x00000C10
70#define MALO_REG_INT_CODE			0x00000C14
71#define MALO_REG_SCRATCH			0x00000C40
72
73/*
74 * define OpMode for SoftAP/Station mode
75 *
76 * the following mode signature has to be written to PCI scratch register#0
77 * right after successfully downloading the last block of firmware and
78 * before waiting for firmware ready signature
79 */
80#define MALO_HOSTCMD_STA_MODE			0x5A
81#define MALO_HOSTCMD_STA_FWRDY_SIGNATURE	0xF0F1F2F4
82
83/*
84 * 16 bit host command code
85 */
86#define MALO_HOSTCMD_NONE			0x0000
87#define MALO_HOSTCMD_CODE_DNLD			0x0001
88#define MALO_HOSTCMD_GET_HW_SPEC		0x0003
89#define MALO_HOSTCMD_SET_HW_SPEC		0x0004
90#define MALO_HOSTCMD_MAC_MULTICAST_ADR		0x0010
91#define MALO_HOSTCMD_SET_WEPKEY			0x0013
92#define MALO_HOSTCMD_802_11_RADIO_CONTROL	0x001c
93#define MALO_HOSTCMD_802_11_RF_TX_POWER		0x001e
94#define MALO_HOSTCMD_802_11_RF_ANTENNA		0x0020
95#define MALO_HOSTCMD_SET_PRE_SCAN		0x0107
96#define MALO_HOSTCMD_SET_POST_SCAN		0x0108
97#define MALO_HOSTCMD_SET_RF_CHANNEL		0x010a
98#define MALO_HOSTCMD_SET_AID			0x010d
99#define MALO_HOSTCMD_SET_RATE			0x0110
100#define MALO_HOSTCMD_SET_SLOT			0x0114
101/* define DFS lab commands  */
102#define MALO_HOSTCMD_SET_FIXED_RATE		0x0126
103#define MALO_HOSTCMD_SET_REGION_POWER		0x0128
104#define MALO_HOSTCMD_GET_CALTABLE		0x1134
105
106/*
107 * definition of action or option for each command.
108 */
109/* define general purpose action  */
110#define MALO_HOSTCMD_ACT_GEN_GET		0x0000
111#define MALO_HOSTCMD_ACT_GEN_SET		0x0001
112#define MALO_HOSTCMD_ACT_GEN_SET_LIST		0x0002
113
114/* define action or option for HostCmd_FW_USE_FIXED_RATE */
115#define MALO_HOSTCMD_ACT_USE_FIXED_RATE		0x0001
116#define MALO_HOSTCMD_ACT_NOT_USE_FIXED_RATE	0x0002
117
118/* INT code register event definition  */
119#define MALO_INT_CODE_CMD_FINISHED		0x00000005
120