1/* $NetBSD: dwc_mmc_var.h,v 1.15 2022/01/09 15:03:43 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2014-2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifndef _DWC_MMC_VAR_H
30#define _DWC_MMC_VAR_H
31
32struct dwc_mmc_softc {
33	device_t sc_dev;
34	bus_space_tag_t sc_bst;
35	bus_space_handle_t sc_bsh;
36	bus_space_handle_t sc_clk_bsh;
37	bus_dma_tag_t sc_dmat;
38
39	u_int sc_flags;
40#define	DWC_MMC_F_DMA		__BIT(0)
41#define	DWC_MMC_F_USE_HOLD_REG	__BIT(1)
42#define	DWC_MMC_F_PWREN_INV	__BIT(2)
43#define	DWC_MMC_F_BROKEN_CD	__BIT(3)
44#define	DWC_MMC_F_NON_REMOVABLE	__BIT(4)
45	uint32_t sc_fifo_reg;
46	uint32_t sc_fifo_depth;
47	u_int sc_clock_freq;
48	u_int sc_bus_width;
49	bool sc_card_inited;
50	u_int sc_verid;
51
52	void *sc_ih;
53	kmutex_t sc_lock;
54	kmutex_t sc_intr_lock;
55	kcondvar_t sc_intr_cv;
56
57	int sc_mmc_width;
58	int sc_mmc_port;
59
60	u_int sc_ciu_div;
61
62	device_t sc_sdmmc_dev;
63
64	uint32_t sc_idma_xferlen;
65	bus_dma_segment_t sc_idma_segs[1];
66	int sc_idma_nsegs;
67	bus_size_t sc_idma_size;
68	bus_dmamap_t sc_idma_map;
69	int sc_idma_ndesc;
70	void *sc_idma_desc;
71
72	bus_dmamap_t sc_dmabounce_map;
73	void *sc_dmabounce_buf;
74	size_t sc_dmabounce_buflen;
75
76	uint32_t sc_intr_card;
77	uint32_t sc_intr_cardmask;
78	struct sdmmc_command *sc_curcmd;
79	bool sc_wait_dma;
80	bool sc_wait_cmd;
81	bool sc_wait_data;
82
83	void (*sc_pre_power_on)(struct dwc_mmc_softc *);
84	void (*sc_post_power_on)(struct dwc_mmc_softc *);
85
86	int (*sc_card_detect)(struct dwc_mmc_softc *);
87	int (*sc_write_protect)(struct dwc_mmc_softc *);
88	void (*sc_set_led)(struct dwc_mmc_softc *, int);
89	int (*sc_bus_clock)(struct dwc_mmc_softc *, int);
90	int (*sc_signal_voltage)(struct dwc_mmc_softc *, int);
91};
92
93int	dwc_mmc_init(struct dwc_mmc_softc *);
94int	dwc_mmc_intr(void *);
95
96#endif /* !_DWC_MMC_VAR_H */
97