1/* $NetBSD: dbcool_reg.h,v 1.9 2020/04/16 23:29:53 rin Exp $ */ 2 3/*- 4 * Copyright (c) 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Goyette 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * a driver for the dbCool(tm) family of environmental controllers 34 */ 35 36#ifndef DBCOOLREG_H 37#define DBCOOLREG_H 38 39#include <sys/cdefs.h> 40__KERNEL_RCSID(0, "$NetBSD: dbcool_reg.h,v 1.9 2020/04/16 23:29:53 rin Exp $"); 41 42#define DBCOOL_ADDRMASK 0x3fc 43#define DBCOOL_ADDR 0x2c /* Some chips have multiple addrs */ 44 45/* The dBCool chip family register set */ 46 47/* Not all registers are available on all chips! */ 48#define DBCOOL_CONFIG5A_REG 0x04 49#define DBCOOL_CONFIG6_REG 0x10 50#define DBCOOL_CONFIG7_REG 0x11 51#define DBCOOL_INTERNAL_TRIP 0x13 52#define DBCOOL_EXTERNAL_TRIP 0x14 53#define DBCOOL_TEST 0x15 54#define DBCOOL_CHANNEL_MODE 0x16 55#define DBCOOL_INT_TRIP_FIXED 0x17 56#define DBCOOL_EXT_TRIP_FIXED 0x18 57#define DBCOOL_ANALOG_OUT 0x19 58#define DBCOOL_PECI1_TEMP 0x1A 59#define DBCOOL_PECI2_TEMP 0x1B 60#define DBCOOL_PECI3_TEMP 0x1C 61#define DBCOOL_IMON 0x1D 62#define DBCOOL_VTT 0x1E 63#define DBCOOL_EXTRES_VTT_IMON 0x1F 64#define DBCOOL_OFFSET 0x1F 65#define DBCOOL_25VIN 0x20 66#define DBCOOL_VCCP 0x21 67#define DBCOOL_VCC 0x22 68#define DBCOOL_5VIN 0x23 69#define DBCOOL_12VIN 0x24 70#define DBCOOL_CPU_VOLTAGE2 0x25 71#define DBCOOL_REMOTE1_TEMP 0x25 72#define DBCOOL_LOCAL_TEMP 0x26 73#define DBCOOL_REMOTE2_TEMP 0x27 74#define DBCOOL_FAN1_TACH_LSB 0x28 75#define DBCOOL_FAN1_TACH_MSB 0x29 76#define DBCOOL_FAN2_TACH_LSB 0x2A 77#define DBCOOL_FAN2_TACH_MSB 0x2B 78#define DBCOOL_FAN3_TACH_LSB 0x2C 79#define DBCOOL_FAN3_TACH_MSB 0x2D 80#define DBCOOL_FAN4_TACH_LSB 0x2E 81#define DBCOOL_FAN4_TACH_MSB 0x2F 82#define DBCOOL_PWM1_CURDUTY 0x30 83#define DBCOOL_DAC0_START 0x30 84#define DBCOOL_PWM2_CURDUTY 0x31 85#define DBCOOL_DAC1_START 0x31 86#define DBCOOL_PWM3_CURDUTY 0x32 87#define DBCOOL_DAC0_MIN 0x32 88#define DBCOOL_PECI0 0x33 89#define DBCOOL_DAC1_MIN 0x33 90#define DBCOOL_PECI_LOWLIM 0x34 91#define DBCOOL_DAC0_MAX 0x34 92#define DBCOOL_PECI_HIGHLIM 0x35 93#define DBCOOL_DAC1_MAX 0x35 94#define DBCOOL_PECI_CFG1 0x36 95#define DBCOOL_DYNTMIN_CNTRL1 0x36 96#define DBCOOL_DYNTMIN_CNTRL2 0x37 97#define DBCOOL_PWM1_MAXDUTY 0x38 98#define DBCOOL_PWM2_MAXDUTY 0x39 99#define DBCOOL_PWM3_MAXDUTY 0x3A 100/* 101 * Note: ADT7490 reused the Device_ID register for PECI Tcontrol value 102 * (equivalent to Ttherm for the regular temp sensors) 103 */ 104#define DBCOOL_DEVICEID_REG 0x3D 105#define DBCOOL_PECI_TCONTROL 0x3D 106#define DBCOOL_COMPANYID_REG 0x3E 107#define DBCOOL_REVISION_REG 0x3F 108#define DBCOOL_CONFIG1_REG 0x40 109#define DBCOOL_DAC0_OUT 0x40 110#define DBCOOL_ISR1_REG 0x41 111#define DBCOOL_DAC1_OUT 0x41 112#define DBCOOL_ISR2_REG 0x42 113#define DBCOOL_ISR3_REG 0x43 114#define DBCOOL_VID_REG 0x43 115#define DBCOOL_25VIN_LOWLIM 0x44 116#define DBCOOL_25VIN_HIGHLIM 0x45 117#define DBCOOL_VCCP_LOWLIM 0x46 118#define DBCOOL_VCCP_HIGHLIM 0x47 119#define DBCOOL_VIDB 0x47 120#define DBCOOL_VCC_LOWLIM 0x48 121#define DBCOOL_VCC_HIGHLIM 0x49 122#define DBCOOL_VID4 0x49 123#define DBCOOL_5VIN_LOWLIM 0x4A 124#define DBCOOL_5VIN_HIGHLIM 0x4B 125#define DBCOOL_12VIN_LOWLIM 0x4C 126#define DBCOOL_12VIN_HIGHLIM 0x4D 127#define DBCOOL_REMOTE1_LOWLIM 0x4E 128#define DBCOOL_REMOTE1_HIGHLIM 0x4F 129#define DBCOOL_LOCAL_LOWLIM 0x50 130#define DBCOOL_LOCAL_HIGHLIM 0x51 131#define DBCOOL_REMOTE2_LOWLIM 0x52 132#define DBCOOL_REMOTE2_HIGHLIM 0x53 133#define DBCOOL_TACH1_MIN_LSB 0x54 134#define DBCOOL_TACH1_MIN_MSB 0x55 135#define DBCOOL_TACH2_MIN_LSB 0x56 136#define DBCOOL_TACH2_MIN_MSB 0x57 137#define DBCOOL_TACH3_MIN_LSB 0x58 138#define DBCOOL_TACH3_MIN_MSB 0x59 139#define DBCOOL_TACH4_MIN_LSB 0x5A 140#define DBCOOL_TACH4_MIN_MSB 0x5B 141#define DBCOOL_PWM1_CTL 0x5C 142#define DBCOOL_PWM2_CTL 0x5D 143#define DBCOOL_PWM3_CTL 0x5E 144#define DBCOOL_REMOTE1_TRANGE 0x5F /* Bits [7:4] */ 145#define DBCOOL_LOCAL_TRANGE 0x60 /* Bits [7:4] */ 146#define DBCOOL_REMOTE2_TRANGE 0x61 /* Bits [7:4] */ 147#define DBCOOL_ENH_ACOUST_1 0x62 148#define DBCOOL_ENH_ACOUST_2 0x63 149#define DBCOOL_PWM1_MINDUTY 0x64 150#define DBCOOL_PWM2_MINDUTY 0x65 151#define DBCOOL_PWM3_MINDUTY 0x66 152#define DBCOOL_REMOTE1_TMIN 0x67 153#define DBCOOL_LOCAL_TMIN 0x68 154#define DBCOOL_REMOTE2_TMIN 0x69 155#define DBCOOL_REMOTE1_TTHRESH 0x6A 156#define DBCOOL_LOCAL_TTHRESH 0x6B 157#define DBCOOL_REMOTE2_TTHRESH 0x6C 158#define DBCOOL_R1_LCL_TMIN_HYST 0x6D 159#define DBCOOL_R2_TMIN_HYST 0x6E 160#define DBCOOL_XNOR_ENABLE 0x6F 161#define DBCOOL_REMOTE1_TEMPOFF 0x70 162#define DBCOOL_LOCAL_TEMPOFF 0x71 163#define DBCOOL_REMOTE2_TEMPOFF 0x72 164#define DBCOOL_CONFIG2_REG 0x73 165#define DBCOOL_IMASK1_REG 0x74 166#define DBCOOL_IMASK2_REG 0x75 167#define DBCOOL_EXTRES1_REG 0x76 168#define DBCOOL_EXTRES2_REG 0x77 169#define DBCOOL_CONFIG3_REG 0x78 170#define DBCOOL_THERM_TIMERSTATUS_REG 0x79 171#define DBCOOL_THERM_TIMERLIMIT_REG 0x7A 172#define DBCOOL_TACHPULSE_REG 0x7B 173#define DBCOOL_CONFIG5_REG 0x7C 174#define DBCOOL_CONFIG4_REG 0x7D 175#define DBCOOL_TEST1_REG 0x7E 176#define DBCOOL_TEST2_REG 0x7F 177#define DBCOOL_GPIO_CONFIG 0x80 178#define DBCOOL_ISR4_REG 0x81 179#define DBCOOL_IMASK3_REG 0x82 180#define DBCOOL_IMASK4_REG 0x83 181#define DBCOOL_VTT_LOWLIM 0x84 182#define DBCOOL_IMON_LOWLIM 0x85 183#define DBCOOL_VTT_HIGHLIM 0x86 184#define DBCOOL_IMON_HIGHLIM 0x87 185#define DBCOOL_PECI_CFG2 0x88 186#define DBCOOL_TEST3_REG 0x89 187#define DBCOOL_PECI_OP_PT 0x8A 188#define DBCOOL_REMOTE1_OP_PT 0x8B 189#define DBCOOL_LOCAL_OP_PT 0x8C 190#define DBCOOL_REMOTE2_OP_PT 0x8D 191#define DBCOOL_DYNTMIN_CTL1 0x8E 192#define DBCOOL_DYNTMIN_CTL2 0x8F 193#define DBCOOL_DYNTMIN_CTL3 0x90 194#define DBCOOL_PECI0_TEMPOFF 0x94 195#define DBCOOL_PECI1_TEMPOFF 0x95 196#define DBCOOL_PECI2_TEMPOFF 0x96 197#define DBCOOL_PECI3_TEMPOFF 0x97 198#define DBCOOL_NO_REG 0xff 199 200/* Config register bit definitions */ 201#define DBCOOL_CFG1_START 0x01 202#define DBCOOL_CFG1_LOCK 0x02 203#define DBCOOL_CFG1_RDY 0x04 204#define DBCOOL_CFG1_FSPD 0x08 205#define DBCOOL_CFG1_VxI 0x10 206#define DBCOOL_CFG1_RESET 0x10 207#define DBCOOL_CFG1_FSPDIS 0x20 208#define DBCOOL_CFG1_12VVID4_SEL 0x20 209#define DBCOOL_CFG1_TODIS 0x40 210#define DBCOOL_CFG1_Vcc 0x80 211#define DBCOOL_CFG1_RESET_LATCH 0x80 212#define DBCOOL_CFG2_AIN1 0x01 213#define DBCOOL_CFG2_AIN2 0x02 214#define DBCOOL_CFG2_AIN3 0x04 215#define DBCOOL_CFG2_AIN4 0x08 216#define DBCOOL_CFG2_AVG 0x10 217#define DBCOOL_CFG2_ATTN 0x20 218#define DBCOOL_CFG2_CONV 0x40 219#define DBCOOL_CFG2_SHDN 0x80 220#define DBCOOL_CFG3_ALERT 0x01 221#define DBCOOL_CFG3_THERM 0x02 222#define DBCOOL_CFG3_BOOST 0x04 223#define DBCOOL_CFG3_FAST 0x08 224#define DBCOOL_CFG3_DC1 0x10 225#define DBCOOL_CFG3_DC2 0x20 226#define DBCOOL_CFG3_DC3 0x40 227#define DBCOOL_CFG3_DC4 0x80 228 229#define DBCOOL_CFG4_PIN9FUNC 0x03 230#define DBCOOL_CFG4_AINL 0x0C 231#define DBCOOL_CFG4_BYPASS_ATTN 0x20 232 233#define DBCOOL_CFG5_TWOSCOMP 0x01 234#define DBCOOL_CFG5_FREQ 0x02 235#define DBCOOL_CFG5_GPIOD 0x04 236#define DBCOOL_CFG5_GPIOP 0x08 237 238#define DBCOOL_CFG6_SLOW_REM1 0x01 239#define DBCOOL_CFG6_SLOW_LOCAL 0x02 240#define DBCOOL_CFG6_SLOW_REM2 0x04 241#define DBCOOL_CFG6_THERM_MAN 0x08 242#define DBCOOL_CFG6_VCCP_LOW 0x40 243#define DBCOOL_CFG6_EXTRASLOW 0x80 244 245#define DBCOOL_CFG7_DIS_THERM_HYST 0x10 246 247/* 248 * The ADT7466 is an orphan stepchild in the dbCool family 249 */ 250#define DBCOOL_ADT7466_CONFIG1 0x00 251#define DBCOOL_ADT7466_CONFIG2 0x01 252#define DBCOOL_ADT7466_CONFIG3 0x02 253#define DBCOOL_ADT7466_CONFIG4 0x03 254#define DBCOOL_ADT7466_CONFIG5 0x04 255#define DBCOOL_ADT7466_AFC1 0x05 256#define DBCOOL_ADT7466_AFC2 0x06 257#define DBCOOL_ADT7466_REM_TEMP_LSB 0x08 258#define DBCOOL_ADT7466_LCL_TEMP_LSB 0x09 259#define DBCOOL_ADT7466_AIN1 0x0A 260#define DBCOOL_ADT7466_AIN2 0x0B 261#define DBCOOL_ADT7466_VCC 0x0C 262#define DBCOOL_ADT7466_REM_TEMP_MSB 0x0D 263#define DBCOOL_ADT7466_LCL_TEMP_MSB 0x0E 264#define DBCOOL_ADT7466_PROCHOT 0x0F 265#define DBCOOL_ADT7466_INTRPT1 0x10 266#define DBCOOL_ADT7466_INTRPT2 0x11 267#define DBCOOL_ADT7466_INTMSK1 0x12 268#define DBCOOL_ADT7466_INTMSK2 0x13 269#define DBCOOL_ADT7466_AIN1_LOLIM 0x14 270#define DBCOOL_ADT7466_AIN1_HILIM 0x15 271#define DBCOOL_ADT7466_AIN2_LOLIM 0x16 272#define DBCOOL_ADT7466_AIN2_HILIM 0x17 273#define DBCOOL_ADT7466_VCC_LOLIM 0x18 274#define DBCOOL_ADT7466_VCC_HILIM 0x19 275#define DBCOOL_ADT7466_REM_TEMP_LOLIM 0x1A 276#define DBCOOL_ADT7466_REM_TEMP_HILIM 0x1B 277#define DBCOOL_ADT7466_LCL_TEMP_LOLIM 0x1C 278#define DBCOOL_ADT7466_LCL_TEMP_HILIM 0x1D 279#define DBCOOL_ADT7466_PROCHOT_LIM 0x1E 280#define DBCOOL_ADT7466_AIN1_THERM 0x1F 281#define DBCOOL_ADT7466_AIN2_THREM 0x20 282#define DBCOOL_ADT7466_REM_THERM 0x21 283#define DBCOOL_ADT7466_LCL_THERM 0x22 284#define DBCOOL_ADT7466_AIN1_OFFSET 0x24 285#define DBCOOL_ADT7466_AIN2_OFFSET 0x25 286#define DBCOOL_ADT7466_REM_OFFSET 0x26 287#define DBCOOL_ADT7466_LCL_OFFSET 0x27 288#define DBCOOL_ADT7466_AIN1_TMIN 0x28 289#define DBCOOL_ADT7466_AIN2_TMIN 0x29 290#define DBCOOL_ADT7466_REM_TMIN 0x2A 291#define DBCOOL_ADT7466_LCL_TMIN 0x2B 292#define DBCOOL_ADT7466_AIN_RANGES 0x2C 293#define DBCOOL_ADT7466_LCL_REM_RANGES 0x2D 294#define DBCOOL_ADT7466_AIN_HYSTS 0x2E 295#define DBCOOL_ADT7466_LCL_REM_HYSTS 0x2F 296#define DBCOOL_ADT7466_FANA_STARTV 0x30 297#define DBCOOL_ADT7466_FANB_STARTV 0x31 298#define DBCOOL_ADT7466_FANA_MINV 0x32 299#define DBCOOL_ADT7466_FANB_MINV 0x33 300#define DBCOOL_ADT7466_FANA_MAXRPM_MSB 0x34 301#define DBCOOL_ADT7466_FANB_MAXRPM_MSB 0x35 302#define DBCOOL_ADT7466_ENH_ACOUSTICS 0x36 303#define DBCOOL_ADT7466_FAULT_INCR 0x37 304#define DBCOOL_ADT7466_TIMEOUT 0x38 305#define DBCOOL_ADT7466_PULSES 0x39 306#define DBCOOL_ADT7466_DRIVE1 0x40 307#define DBCOOL_ADT7466_DRIVE2 0x41 308#define DBCOOL_ADT7466_XOR_TEST 0x42 309#define DBCOOL_ADT7466_FANA_LSB 0x48 310#define DBCOOL_ADT7466_FANA_MSB 0x49 311#define DBCOOL_ADT7466_FANB_LSB 0x4A 312#define DBCOOL_ADT7466_FANB_MSB 0x4B 313#define DBCOOL_ADT7466_FANA_LOLIM_LSB 0x4C 314#define DBCOOL_ADT7466_FANA_LOLIM_MSB 0x4D 315#define DBCOOL_ADT7466_FANB_LOLIM_LSB 0x4E 316#define DBCOOL_ADT7466_FANB_LOLIM_MSB 0x4F 317 318#define DBCOOL_ADT7466_CFG1_Vcc 0x40 319#define DBCOOL_ADT7466_CFG2_SHDN 0x40 320 321/* 322 * Even though it's not really a member of the dbCool family, we also 323 * support the ADM1030 chip. It has a different register set. 324 * the ADM1030 is in fact a cut down ADM1031 - the register set is identical 325 * except the registers used for the extra temperature and fan control sensors 326 * DBCOOL_ADM1030_* are present in both chips with identical functionality 327 * DBCOOL_ADM1031_* are ADM1031 only 328 */ 329#define DBCOOL_ADM1030_CFG1 0x00 330#define DBCOOL_ADM1030_CFG2 0x01 331#define DBCOOL_ADM1030_STATUS1 0x02 332#define DBCOOL_ADM1030_STATUS2 0x03 333#define DBCOOL_ADM1030_TEMP_EXTRES 0x06 334#define DBCOOL_ADM1030_TEST_REG 0x07 335#define DBCOOL_ADM1030_FAN_TACH 0x08 336#define DBCOOL_ADM1031_FAN2_TACH 0x09 337#define DBCOOL_ADM1030_L_TEMP 0x0A 338#define DBCOOL_ADM1030_R_TEMP 0x0B 339#define DBCOOL_ADM1031_R2_TEMP 0x0C 340#define DBCOOL_ADM1030_L_OFFSET 0x0D 341#define DBCOOL_ADM1030_R_OFFSET 0x0E 342#define DBCOOL_ADM1031_R2_OFFSET 0x0F 343#define DBCOOL_ADM1030_FAN_LO_LIM 0x10 344#define DBCOOL_ADM1031_FAN2_LO_LIM 0x11 345#define DBCOOL_ADM1030_L_HI_LIM 0x14 346#define DBCOOL_ADM1030_L_LO_LIM 0x15 347#define DBCOOL_ADM1030_L_TTHRESH 0x16 348#define DBCOOL_ADM1030_R_HI_LIM 0x18 349#define DBCOOL_ADM1030_R_LO_LIM 0x19 350#define DBCOOL_ADM1030_R_TTHRESH 0x1A 351#define DBCOOL_ADM1031_R2_HI_LIM 0x1C 352#define DBCOOL_ADM1031_R2_LO_LIM 0x1D 353#define DBCOOL_ADM1031_R2_TTHRESH 0x1E 354#define DBCOOL_ADM1030_FAN_CHAR 0x20 355#define DBCOOL_ADM1031_FAN2_CHAR 0x21 356#define DBCOOL_ADM1030_FAN_SPEED_CFG 0x22 357#define DBCOOL_ADM1030_FAN_FILTER 0x23 358#define DBCOOL_ADM1030_L_TMIN 0x24 359#define DBCOOL_ADM1030_R_TMIN 0x25 360#define DBCOOL_ADM1031_R2_TMIN 0x26 361#define DBCOOL_ADM1030_DEVICEID DBCOOL_DEVICEID_REG 362#define DBCOOL_ADM1030_COMPANYID DBCOOL_COMPANYID_REG 363#define DBCOOL_ADM1030_REVISION DBCOOL_REVISION_REG 364 365/* 366 * Macros to locate limit registers for the various sensor types 367 */ 368#define DBCOOL_VOLT_LOLIM(reg) ((reg - DBCOOL_25VIN) * 2 + DBCOOL_25VIN_LOWLIM) 369#define DBCOOL_VOLT_HILIM(reg) (DBCOOL_VOLT_LOLIM(reg) + 1) 370#define DBCOOL_TEMP_LOLIM(reg) \ 371 ((reg - DBCOOL_LOCAL_TEMP) * 2 + DBCOOL_LOCAL_LOWLIM) 372#define DBCOOL_TEMP_HILIM(reg) (DBCOOL_TEMP_LOLIM(reg) + 1) 373#define DBCOOL_TACH_LOLIM(reg) \ 374 (reg - DBCOOL_FAN1_TACH_LSB + DBCOOL_TACH1_MIN_LSB) 375#define ADM1030_TEMP_HILIM(reg) \ 376 ((reg - DBCOOL_ADM1030_L_TEMP) * 3 + DBCOOL_ADM1030_L_HI_LIM) 377#define ADM1030_TEMP_LOLIM(reg) \ 378 ((reg - DBCOOL_ADM1030_L_TEMP) * 3 + DBCOOL_ADM1030_L_LO_LIM) 379#define ADT7466_LIM_OFFSET(reg) \ 380 ((reg - DBCOOL_AIN1) * 2 + DBCOOL_AIN1_LOWLIM) 381#define ADT7466_FAN_LIM_OFFSET(reg) \ 382 (reg - DBCOOL_FANA_LSB + DBCOOL_FANA_LOWLIM_LSB) 383 384 385/* Company and Device ID values */ 386#define DBCOOL_COMPANYID 0x41 387#define SMSC_COMPANYID 0x5c 388#define EMC6D103S_REV_ID 0x68 /* A0 stepping */ 389#define EMC6D103S_DEVICEID 0xff /* device id not used */ 390 391#define ADM1027_DEVICEID 0x27 392#define ADM1030_DEVICEID 0x30 393#define ADM1031_DEVICEID 0x31 394#define ADT7463_DEVICEID 0x27 395#define ADT7466_DEVICEID 0x66 396#define ADT7467_DEVICEID 0x68 /* The ADT7467/7468 cannot be */ 397#define ADT7468_DEVICEID 0x68 /* distinguished by DEVICEID */ 398#define ADT7473_DEVICEID 0x73 399#define ADT7475_DEVICEID 0x75 400#define ADT7476_DEVICEID 0x76 401#define ADT7490_DEVICEID 0xFF /* Device ID not used on 7490 */ 402 403#define ADM1027_REV_ID 0x60 404#define ADT7463_REV_ID1 0x62 405#define ADT7463_REV_ID2 0x6A 406#define ADT7467_REV_ID1 0x71 407#define ADT7467_REV_ID2 0x72 408#define ADT7473_REV_ID1 0x68 409#define ADT7473_REV_ID2 0x69 410#define ADT7490_REV_ID 0x6E 411 412#endif /* def DBCOOLREG_H */ 413