1/* $NetBSD: memerr.c,v 1.21 2008/06/28 12:13:38 tsutsui Exp $ */ 2 3/* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)memreg.c 8.1 (Berkeley) 6/11/93 41 */ 42 43#include <sys/cdefs.h> 44__KERNEL_RCSID(0, "$NetBSD: memerr.c,v 1.21 2008/06/28 12:13:38 tsutsui Exp $"); 45 46#include <sys/param.h> 47#include <sys/systm.h> 48#include <sys/device.h> 49 50#include <machine/autoconf.h> 51#include <machine/cpu.h> 52#include <machine/idprom.h> 53#include <machine/pte.h> 54 55#include <sun3/sun3/machdep.h> 56#include <sun3/dev/memerr.h> 57/* #include <sun3/dev/eccreg.h> - not yet */ 58 59#define ME_PRI 7 /* Interrupt level (NMI) */ 60 61enum memerr_type { ME_PAR = 0, ME_ECC = 1 }; 62 63struct memerr_softc { 64 device_t sc_dev; 65 struct memerr *sc_reg; 66 enum memerr_type sc_type; 67 const char *sc_typename; /* "Parity" or "ECC" */ 68 const char *sc_csrbits; /* how to print csr bits */ 69 /* XXX: counters? */ 70}; 71 72static int memerr_match(device_t, cfdata_t, void *); 73static void memerr_attach(device_t, device_t, void *); 74static int memerr_interrupt(void *); 75static void memerr_correctable(struct memerr_softc *); 76 77CFATTACH_DECL_NEW(memerr, sizeof(struct memerr_softc), 78 memerr_match, memerr_attach, NULL, NULL); 79 80static int memerr_attached; 81 82static int 83memerr_match(device_t parent, cfdata_t cf, void *args) 84{ 85 struct confargs *ca = args; 86 87 /* This driver only supports one instance. */ 88 if (memerr_attached) 89 return 0; 90 91 /* Make sure there is something there... */ 92 if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1) 93 return 0; 94 95 /* Default interrupt priority. */ 96 if (ca->ca_intpri == -1) 97 ca->ca_intpri = ME_PRI; 98 99 return 1; 100} 101 102static void 103memerr_attach(device_t parent, device_t self, void *args) 104{ 105 struct memerr_softc *sc = device_private(self); 106 struct confargs *ca = args; 107 struct memerr *mer; 108 109 sc->sc_dev = self; 110 111 /* 112 * Which type of memory subsystem do we have? 113 */ 114 switch (cpu_machine_id) { 115 case ID_SUN3_160: /* XXX: correct? */ 116 case ID_SUN3_260: 117 case ID_SUN3X_470: 118 sc->sc_type = ME_ECC; 119 sc->sc_typename = "ECC"; 120 sc->sc_csrbits = ME_ECC_STR; 121 break; 122 123 default: 124 sc->sc_type = ME_PAR; 125 sc->sc_typename = "Parity"; 126 sc->sc_csrbits = ME_PAR_STR; 127 break; 128 } 129 aprint_normal(": (%s memory)\n", sc->sc_typename); 130 131 mer = bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*mer)); 132 if (mer == NULL) 133 panic("%s: can not map register", device_xname(self)); 134 sc->sc_reg = mer; 135 136 /* Install interrupt handler. */ 137 isr_add_autovect(memerr_interrupt, sc, ca->ca_intpri); 138 139 /* Enable error interrupt (and checking). */ 140 if (sc->sc_type == ME_PAR) 141 mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK; 142 else { 143 /* 144 * XXX: Some day, figure out how to decode 145 * correctable errors and set ME_ECC_CE_ENA 146 * here so we can log them... 147 */ 148 mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */ 149 } 150 memerr_attached = 1; 151} 152 153/***************************************************************** 154 * Functions for ECC memory 155 *****************************************************************/ 156 157static int 158memerr_interrupt(void *arg) 159{ 160 struct memerr_softc *sc = arg; 161 volatile struct memerr *me = sc->sc_reg; 162 uint8_t csr, ctx; 163 u_int pa, va; 164 int pte; 165 uint8_t bits[64]; 166 167 csr = me->me_csr; 168 if ((csr & ME_CSR_IPEND) == 0) 169 return 0; 170 171 va = me->me_vaddr; 172 ctx = (va >> 28) & 0xF; 173 va &= 0x0FFFffff; 174 pte = get_pte(va); 175 pa = PG_PA(pte); 176 177 printf("\nMemory error on %s cycle!\n", 178 (ctx & 8) ? "DVMA" : "CPU"); 179 printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n", 180 (ctx & 7), va, pa); 181 snprintb(bits, sizeof(bits), sc->sc_csrbits, csr); 182 printf(" csr=%s\n", bits); 183 184 /* 185 * If we have parity-checked memory, there is 186 * not much to be done. Any error is fatal. 187 */ 188 if (sc->sc_type == ME_PAR) { 189 if (csr & ME_PAR_EMASK) { 190 /* Parity errors are fatal. */ 191 goto die; 192 } 193 /* The IPEND bit was set, but no error bits. */ 194 goto noerror; 195 } 196 197 /* 198 * We have ECC memory. More complicated... 199 */ 200 if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) { 201 printf(" write-back failed, pte=0x%x\n", pte); 202 goto die; 203 } 204 if (csr & ME_ECC_UE) { 205 printf(" uncorrectable ECC error\n"); 206 goto die; 207 } 208 if (csr & ME_ECC_CE) { 209 /* Just log this and continue. */ 210 memerr_correctable(sc); 211 goto recover; 212 } 213 /* The IPEND bit was set, but no error bits. */ 214 goto noerror; 215 216die: 217 panic("all bets are off..."); 218 219noerror: 220 printf("memerr: no error bits set?\n"); 221 222recover: 223 /* Clear the error by writing the address register. */ 224 me->me_vaddr = 0; 225 return 1; 226} 227 228/* 229 * Announce (and log) a correctable ECC error. 230 * Need to look at the ECC syndrome register on 231 * the memory board that caused the error... 232 */ 233void 234memerr_correctable(struct memerr_softc *sc) 235{ 236 237 /* XXX: Not yet... */ 238} 239