1/* $NetBSD: reg.h,v 1.15 2016/12/30 18:30:19 christos Exp $ */ 2 3/* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)reg.h 8.1 (Berkeley) 6/11/93 41 */ 42 43/* 44 * Copyright (c) 1996-2002 Eduardo Horvath. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. Neither the name of the author nor the names of its contributors 55 * may be used to endorse or promote products derived from this software 56 * without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 59 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 60 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 61 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 62 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 63 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 64 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 66 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 67 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 68 * SUCH DAMAGE. 69 * 70 * @(#)reg.h 8.1 (Berkeley) 6/11/93 71 */ 72 73#ifndef _MACHINE_REG_H_ 74#define _MACHINE_REG_H_ 75 76/* 77 * Registers passed to trap/syscall/etc. 78 * This structure is known to occupy exactly 80 bytes (see locore.s). 79 * Note, tf_global[0] is not actually written (since g0 is always 0). 80 * (The slot tf_global[0] is used to send a copy of %wim to kernel gdb. 81 * This is known as `cheating'.) 82 */ 83struct trapframe32 { 84 int tf_psr; /* psr */ 85 int tf_pc; /* return pc */ 86 int tf_npc; /* return npc */ 87 int tf_y; /* %y register */ 88 int tf_global[8]; /* global registers in trap's caller */ 89 int tf_out[8]; /* output registers in trap's caller */ 90}; 91 92/* 93 * The v9 trapframe is a bit more complex. Since we don't get a free 94 * register window with each trap we need some way to keep track of 95 * pending traps. 96 * (The slot tf_global[0] is used to store the %fp when this is used 97 * as a clockframe. This is known as `cheating'.) 98 */ 99 100struct trapframe64 { 101 int64_t tf_tstate; /* tstate register */ 102 int64_t tf_pc; /* return pc */ 103 int64_t tf_npc; /* return npc */ 104 int64_t tf_fault; /* faulting addr -- need somewhere to save it */ 105 int64_t tf_kstack; /* kernel stack of prev tf */ 106 int tf_y; /* %y register -- 32-bits */ 107 short tf_tt; /* What type of trap this was */ 108 char tf_pil; /* What IRQ we're handling */ 109 char tf_oldpil; /* What our old SPL was */ 110 int64_t tf_global[8]; /* global registers in trap's caller */ 111 /* n.b. tf_global[0] is used for fp when this is a clockframe */ 112 int64_t tf_out[8]; /* output registers in trap's caller */ 113 int64_t tf_local[8]; /* local registers in trap's caller (for debug) */ 114 int64_t tf_in[8]; /* in registers in trap's caller (for debug) */ 115}; 116 117 118/* 119 * Register windows. Each stack pointer (%o6 aka %sp) in each window 120 * must ALWAYS point to some place at which it is safe to scribble on 121 * 64 bytes. (If not, your process gets mangled.) Furthermore, each 122 * stack pointer should be aligned on an 8-byte boundary for v8 stacks 123 * or a 16-byte boundary (plus the BIAS) for v9 stacks (the kernel 124 * as currently coded allows arbitrary alignment, but with a hefty 125 * performance penalty). 126 */ 127struct rwindow32 { 128 int rw_local[8]; /* %l0..%l7 */ 129 int rw_in[8]; /* %i0..%i7 */ 130}; 131 132/* Don't forget the BIAS!! */ 133struct rwindow64 { 134 int64_t rw_local[8]; /* %l0..%l7 */ 135 int64_t rw_in[8]; /* %i0..%i7 */ 136}; 137 138/* 139 * Clone trapframe for now; this seems to be the more useful 140 * than the old struct reg above. 141 */ 142struct reg32 { 143 int r_psr; /* psr */ 144 int r_pc; /* return pc */ 145 int r_npc; /* return npc */ 146 int r_y; /* %y register */ 147 int r_global[8]; /* global registers in trap's caller */ 148 int r_out[8]; /* output registers in trap's caller */ 149}; 150 151struct reg64 { 152 int64_t r_tstate; /* tstate register */ 153 int64_t r_pc; /* return pc */ 154 int64_t r_npc; /* return npc */ 155 int r_y; /* %y register -- 32-bits */ 156 int64_t r_global[8]; /* global registers in trap's caller */ 157 int64_t r_out[8]; /* output registers in trap's caller */ 158}; 159 160#include <machine/fsr.h> 161 162/* 163 * FP coprocessor registers. 164 * 165 * FP_QSIZE is the maximum coprocessor instruction queue depth 166 * of any implementation on which the kernel will run. David Hough: 167 * ``I'd suggest allowing 16 ... allowing an indeterminate variable 168 * size would be even better''. Of course, we cannot do that; we 169 * need to malloc these. 170 * 171 * XXXX UltraSPARC processors don't implement a floating point queue. 172 */ 173#define FP_QSIZE 16 174#define ALIGNFPSTATE(f) ((struct fpstate64 *)(((long)(f))&(~SPARC64_BLOCK_ALIGN))) 175 176struct fp_qentry { 177 int *fq_addr; /* the instruction's address */ 178 int fq_instr; /* the instruction itself */ 179}; 180 181/* 182 * The actual FP registers are made accessible (c.f. ptrace(2)) through 183 * a `struct fpreg'; <arch/sparc64/sparc64/process_machdep.c> relies on the 184 * fact that `fpreg' is a prefix of `fpstate'. 185 */ 186struct fpreg64 { 187 u_int fr_regs[64]; /* our view is 64 32-bit registers */ 188 int64_t fr_fsr; /* %fsr */ 189 int fr_gsr; /* graphics state reg */ 190}; 191 192struct fpstate64 { 193 struct fpreg64 fs_reg; 194#define fs_regs fs_reg.fr_regs 195#define fs_fsr fs_reg.fr_fsr 196#define fs_gsr fs_reg.fr_gsr 197 int fs_qsize; /* actual queue depth */ 198 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 199}; 200 201/* 202 * 32-bit fpreg used by 32-bit sparc CPUs 203 */ 204struct fpreg32 { 205 u_int fr_regs[32]; /* our view is 32 32-bit registers */ 206 int fr_fsr; /* %fsr */ 207}; 208 209/* 210 * For 32-bit emulations. 211 */ 212struct fpstate32 { 213 struct fpreg32 fs_reg; 214 int fs_qsize; /* actual queue depth */ 215 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 216}; 217 218#if defined(__arch64__) 219/* Here we gotta do naughty things to let gdb work on 32-bit binaries */ 220#define reg reg64 221#define fpreg fpreg64 222#define fpstate fpstate64 223#define trapframe trapframe64 224#define rwindow rwindow64 225#else 226#define reg reg32 227#define fpreg fpreg32 228#define fpstate fpstate32 229#define trapframe trapframe32 230#define rwindow rwindow32 231#endif 232 233#endif /* _MACHINE_REG_H_ */ 234