1/*	$NetBSD: psl.h,v 1.12 2020/08/03 16:43:44 uwe Exp $	*/
2
3/*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 *	@(#)psl.h	5.2 (Berkeley) 1/18/91
35 */
36
37#ifndef _SH3_PSL_H_
38#define	_SH3_PSL_H_
39
40/*
41 * SuperH Processer Status Register.
42 */
43#define	PSL_TBIT	0x00000001	/* T bit */
44#define	PSL_SBIT	0x00000002	/* S bit */
45#define	PSL_IMASK	0x000000f0	/* Interrupt Mask bit */
46#define	PSL_QBIT	0x00000100	/* Q bit */
47#define	PSL_MBIT	0x00000200	/* M bit */
48#define	PSL_FD		0x00008000	/* FPU Disable bit */
49#define	PSL_BL		0x10000000	/* Exception Block bit */
50#define	PSL_RB		0x20000000	/* Register Bank bit */
51#define	PSL_MD		0x40000000	/* Processor Mode bit */
52                                        /* 1 = kernel, 0 = user */
53
54#define	PSL_MBO		0x00000000	/* must be one bits */
55#define	PSL_MBZ		0x8ffffc0c	/* must be zero bits */
56
57#define	PSL_USERSET	0
58#define	PSL_USERSTATIC	(PSL_BL|PSL_RB|PSL_MD|PSL_IMASK|PSL_MBO|PSL_MBZ)
59
60#define	KERNELMODE(sr)		((sr) & PSL_MD)
61
62#ifdef _KERNEL
63#ifndef _LOCORE
64
65static inline __always_inline void
66_cpu_set_sr(uint32_t sr)
67{
68    __asm volatile("ldc %0, sr" :: "r"(sr));
69}
70
71/* SR.IMASK */
72int _cpu_intr_raise(int);
73int _cpu_intr_suspend(void);
74int _cpu_intr_resume(int);
75
76/* SR.BL */
77int _cpu_exception_suspend(void);
78void _cpu_exception_resume(int);
79
80#endif /* !_LOCORE */
81#endif /* _KERNEL */
82
83#endif /* !_SH3_PSL_H_ */
84