1/* $NetBSD: oioc.c,v 1.6 2021/08/07 16:19:04 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2009 Stephen M. Rumble 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27/* 28 * IOC1/IOC2 chips on IP4 and IP6/IP10 machines. This interfaces the SCSI 29 * and Ethernet controllers, performs DMA for the former, and does address 30 * space translation for the latter (maps the lance memory space to physical 31 * pages). 32 * 33 * 'I/O Controller' is a sufficiently generic name that SGI created another 34 * one for IP24, which basically stuffed a bunch of miscellany on an ASIC. 35 * So, we'll call ourselves 'Old IOC' and hope that there wasn't an even older 36 * one. 37 */ 38 39#include <sys/cdefs.h> 40__KERNEL_RCSID(0, "$NetBSD: oioc.c,v 1.6 2021/08/07 16:19:04 thorpej Exp $"); 41 42#include <sys/param.h> 43#include <sys/device.h> 44 45#include <machine/cpu.h> 46#include <machine/locore.h> 47#include <machine/autoconf.h> 48#include <sys/bus.h> 49#include <machine/machtype.h> 50#include <machine/sysconf.h> 51 52#include <sgimips/ioc/oiocreg.h> 53#include <sgimips/ioc/oiocvar.h> 54 55#include "locators.h" 56 57struct oioc_softc { 58 int sc_burst_dma; 59 60 bus_space_tag_t sc_iot; 61 bus_space_handle_t sc_ioh; 62}; 63 64static int oioc_match(device_t, cfdata_t, void *); 65static void oioc_attach(device_t, device_t, void *); 66static int oioc_print(void *, const char *); 67 68CFATTACH_DECL_NEW(oioc, sizeof(struct oioc_softc), 69 oioc_match, oioc_attach, NULL, NULL); 70 71struct oioc_device { 72 const char *od_name; 73 int od_irq; 74} oioc_devices[] = { 75 { "oiocsc", 4 }, 76 { "le", 5 }, 77 { NULL, 0 } 78}; 79 80static int 81oioc_match(device_t parent, cfdata_t match, void *aux) 82{ 83 84 switch(mach_type) { 85 case MACH_SGI_IP4: 86 case MACH_SGI_IP6 | MACH_SGI_IP10: 87 return (1); 88 } 89 90 return (0); 91} 92 93static void 94oioc_attach(device_t parent, device_t self, void *aux) 95{ 96 struct oioc_softc *sc = device_private(self); 97 struct mainbus_attach_args *ma = aux; 98 uint32_t reg1, reg2; 99 int oiocrev, i; 100 101 sc->sc_iot = normal_memt; 102 if (bus_space_map(sc->sc_iot, ma->ma_addr, OIOC_SCSI_REGS_SIZE, 103 BUS_SPACE_MAP_LINEAR, &sc->sc_ioh)) 104 panic("oioc_attach: could not allocate memory\n"); 105 106 if (platform.badaddr((void *)MIPS_PHYS_TO_KSEG1(ma->ma_addr + 107 OIOC2_CONFIG), 4)) 108 oiocrev = 1; 109 else 110 oiocrev = 2; 111 112 printf("\noioc0: Old SGI IOC%d\n", oiocrev); 113 114 if (oiocrev == 2) { 115 char buf[64]; 116 117 /* Try to enable burst mode. If we can't, we can't... */ 118 reg1 = 12 << OIOC2_CONFIG_HIWAT_SHFT; 119 reg1 |= OIOC2_CONFIG_BURST_MASK; 120 bus_space_write_4(sc->sc_iot, sc->sc_ioh, OIOC2_CONFIG, reg1); 121 DELAY(1000); 122 reg2 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, OIOC2_CONFIG); 123 if ((reg2 & (reg1 | OIOC2_CONFIG_NOSYNC_MASK)) == reg1) 124 sc->sc_burst_dma = 1; 125 126 snprintb(buf, sizeof(buf), 127 "\177\020" 128 "f\0\4HIWAT\0" 129 "f\4\2ID\0" 130 "b\6NOSYNC\0" 131 "b\7BURST\0" 132 "f\x8\7COUNT\0" 133 "f\x10\6SCP\0" 134 "f\x1c\4IOP\0\0", 135 (u_quad_t)reg2 & 0xffffffff); 136 printf("oioc0: %s\n", buf); 137 } 138 139 printf("oioc0: Burst DMA %ssupported\n", 140 (sc->sc_burst_dma) ? "" : "not "); 141 142 for (i = 0; oioc_devices[i].od_name != NULL; i++) { 143 struct oioc_attach_args oa; 144 145 oa.oa_name = oioc_devices[i].od_name; 146 oa.oa_irq = oioc_devices[i].od_irq; 147 oa.oa_burst_dma = sc->sc_burst_dma; 148 oa.oa_st = normal_memt; 149 oa.oa_sh = sc->sc_ioh; 150 oa.oa_dmat = &sgimips_default_bus_dma_tag; 151 config_found(self, &oa, oioc_print, CFARGS_NONE); 152 } 153} 154 155static int 156oioc_print(void *aux, const char *pnp) 157{ 158 struct oioc_attach_args *oa = aux; 159 160 if (pnp) 161 printf("%s at %s", oa->oa_name, pnp); 162 163 return (UNCONF); 164} 165