NameDateSize

..Today79

compile/H12-Oct-20154

conf/H04-Apr-202410

include/H15-Apr-202165

isa/H12-Oct-20157

MakefileH A D04-Apr-2011872

pci/H21-Dec-20235

READMEH A D17-Oct-20075.9 KiB

README.NASH A D25-May-20132.3 KiB

sandpoint/H05-Mar-202414

stand/HToday6

README

1/*	$NetBSD: README,v 1.2.90.1 2007/05/04 19:26:52 nisimura Exp $	*/
2
3Overview
4
5This is a port to the Motorola "SandPoint" evaluation system.  The
6SandPoint is the successor to the "Yellowknife" system.  The system
7can be fitted with different PMCs (Processor Mezzanine Cards).  This
8port is specifically for the rev X2 motherboard system with the PPC
98240 PMC rev X4 installed.  It also works with the Altimus X2 PMC
10(MPC7400 with MPC107).
11
12All references (cf) listed here are for the MPC8240 Integrated Processor
13User's Manual.
14
15Information on the Sandpoint can be found on Motorola's web site:
16http://www.mot.com/SPS/PowerPC/teksupport/refdesigns/sandpoint.html
17
18
19SandPoint Hardware Configuration
20
21This port was developed on a Sandpoint X2 motherboard with a Unity X4 PMC.
22
23This port assumes that the jumpers are set as follows:
24	S3/S4	- Mode 1: PMC w/o IDE (switches opposite, one nearest PCI
25		  slot toward near edge)
26	S5	- Interrupt to PMC normal (switch toward near edge)
27	S6	- Local I/O shared with slot 2 (switch toward near edge)
28
29Mode 0 (PMC w/ IDE) does not appear to work right with ISA interrupts.  The
30interrupts from the Winbond chip do not appear at the PMC.
31
32On the PPMC, we assume a 100MHz clock.
33on PPMC: (C == closed, or "on")
34    SW2:
35	C	ROM on PCI bus (DINK32 on mainboard)
36	-	Map "B": CHRP
37	C	Motorola PPMC
38	C	Wait for initialization (peripheral mode)
39	-	Program mode: Normal mode
40	-	Select normal ROM
41	-	33 MHz only
42	-	COP only resets local CPU/MPC107
43    SW3:
44	-C--C	PCI 33, Mem 66, PPC 266
45	--	0.5 - 0.9 ns PCI hold time
46	C	25 ohm PCI drive strength
47
48
49Address Map
50
51For this port, we choose the "Address Map B" (CHRP-compatible) for the
52system (see SW2, #2, above):
53
54 (Processor View)
550000 0000   0009 FFFF	System Memory
56000A 0000   000F FFFF	Compatibility Hole (programmable to go to PCI space
57			or system memory--programmed for system memory--cf 5.8)
580010 0000   3FFF FFFF	System memory
594000 0000   7FFF FFFF	Reserved (programmed to give a memory select
60			error if accessed--cf 5.7.2)
618000 0000   FCFF FFFF	PCI memory space
62FD00 0000   FDFF FFFF	PCI/ISA memory space (see 5.8, CPU_FD_ALIAS_EN)
63FE00 0000   FE7F FFFF	PCI/ISA I/O space (Forwarded to PCI address space
64			with high byte zeroed, but FE01 0000 and up are
65			reserved)
66FE80 0000   FEBF FFFF	PCI I/O space (Forwarded to PCI I/O space with high
67			byte zeroed)
68FEC0 0000   FEDF FFFF	PCI configuration address register (Each word in this
69			range is aliased to the PCI CONFIG_ADDR register)
70FEE0 0000   FEEF FFFF	PCI configuration data register (Each word in this
71			range is aliased to the PCI CONFIG_DATA register)
72FEF0 0000   FEFF FFFF	PCI interrupt acknowledge
73FF00 0000   FF7F FFFF	32- or 64-bit Flash/ROM space (Can hit either local
74			memory or PCI bus -- cf. 5.6)
75FF80 0000   FFFF FFFF	8-, 32- or 64-bit Flash/ROM space (Can hit either
76			local memory or PCI bus -- cf. 5.6)
77
78This is a host-mode port, so the inbound and output translation windows
79are unused.
80
81The Embedded Utilities Memory Block (EUMB) is set to be 1M below the end
82of the PCI memory space: FC00 0000, so EUMBBAR is FC00 0000, giving us
83
84Message unit (I2O) base	: FC00 0000	(cf. 10.2, 10.2.3, 10.3)
85DMA base		: FC00 1000	(cf. 9.2)
86ATU base		: FC00 2000	(cf. 4.3.3)
87I2C base		: FC00 3000	(cf. 11.3)
88EPIC base		: FC04 0000	(cf. 12.2)
89
90
91
92Boot Information
93
94The SandPoint ships with the Motorola DINK32 ROM.  This is a rather
95basic ROM with only serial-download (S-Record) capability for
96loading the kernel.  Basically, the kernel is loaded to a specified
97address and you jump to it.  The ROM takes care of initializing
98the MICRs and MCCRs.  There is really no boot information to pass.
99
100It would be nice to have a much more complete ROM interface, allowing
101settings for, say, bootp/tftp boot, automatic boot, and persistent
102settings (for console rate, auto boot, bootp, etc), and that might
103be provided at some point, but that's not available as of this
104writing.
105
106So, the kernel is hard-coded to boot w/ 32MB for now.
107
108
109
110Interrupt Configuration
111
112The 8240 has the internal EPIC.  For the SandPoint, the EPIC is programmed
113in mixed-mode (GCR) with direct interrupts (EICR).  With this configuration,
114there are 13 available interrupts:
115	4 global timers
116	5 direct IRQs
117		IRQ0 - PCI Slot #0 INTA#
118		IRQ1 - PCI Slot #1 INTA# / shared with WinBond I/O
119		IRQ2 - PCI Slot #2 INTA#
120		IRQ3 - PCI Slot #3 INTA#
121		IRQ4 - On-PPMC 16552 interrupt (Unity X2)
122		IRQ4 - pulled down w/ resistor (Unity X4)
123	4 internal interrupts
124		I2C
125		DMA Ch0
126		DMA Ch1
127		I2O message unit
128
129The SandPoint can run in one of 4 interrupt modes:
130  0 - PMC host with IDE (3.3v PCI slots are unavailable)
131  1 - PMC host w/o IDE (all PCI slots are available)
132  2 - PMC agent, Winbond providing arbitration & interrupt to INTA# on PMC
133  3 - Yellowknife mode--just like #2, except drives INTA# on 4th PCI slot
134
135We choose to run in mode 1 as Motorola recommends modes 0 or 1 for
136all new development.  Unfortunately, mode 0 does not appear to
137work--"ISA" interrupts are lost.  In this mode, with interrupts
138routed to PCI slot 3, we have to check for both a Winbond (ISA)
139interrupt, and a PCI slot interrupt.  So basically, we have a
140two-level interrupt configuration for Winbond interrupts.  The ISA
141bus attachment registers an interrupt for PCI slot 3 with its own
142interrupt handler.  Drivers for ISA devices on the Winbond will
143register interrupts with the ISA interrupt handler.  The sticky
144part of this is how to deal with one global interrupt priority.
145
146
147
148SandPoint III "SP3" Interrupt Configuration
149
150With a help of additional logic circuit SP3 organizes external
151interrupt sources as EPIC serial mode interrupts.
152	16 serial IRQs
153		IRQ0 - WinBond South bridge i8259 PIC, polarity inverted
154		IRQ1 - reserved
155		IRQ2 - PCI Slot #1, INTA#
156		IRQ3 - PCI Slot #2, INTA#
157		IRQ4 - PCI Slot #3, INTA#
158		IRQ5 - PCI Slot #4, INTA#
159		IRQ6 - WinBond INTA#
160		IRQ7 - WinBond INTB#
161		IRQ8 - WinBond INTC#
162		IRQ9 - WinBond INTD#
163		IRQ10 thru 15 - reserved
164SP3 provides switch selections to emulate SP1/2 compatible EPIC
165direct mode interrupt assignments.
166

README.NAS

1$NetBSD: README.NAS,v 1.22 2012/11/26 17:56:17 phx Exp $
2
3//// MPC8241/8245 NAS products ////
4
5The following NAS products are known by NetBSD/sandpoint.
6
7NIC	IDE		machine description
8----	----		--------------------------
9			>> Board type BRD_KUROBOX <<
10tlp.11	cmdide.12	classic KuroBox, LinkStation HD-HLAN(LS1)
11re.11	cmdide.12	KuroBox HG
12re.11	iteide.12	Gigabit LinkStation HD-HGLAN (also with cmdide)
13re.11	iteide.12/13	classic TeraStation HD-HTGL
14re.11	satalink.12/13	TeraStation Pro TS-TGL v1
15
16			>> Board type BRD_SYNOLOGY <<
17sk.15	iteide.13	Synology DS-106j, LinkStation LANxxxG
18sk.15	satalink.13	Synology DS-101g+/106e/106/106x/107e/107/207
19			DS-108j/109j/209j
20sk.15	satalink.12/13	Synology CS-406/RS-406/CS-406e/CS-407e
21
22			>> Board type BRD_QNAPTS <<
23wm.15	satalink.13 	QNAP TS-100/TS-101(V1.02)
24re.15	satalink.13	QNAP TS-101(V200), QNAP TS-201, LevelOne FNS-5000B
25
26			>> Board type BRD_STORCENTER <<
27re.15	viaide.13	IOMEGA StorCenter 250/500/1T
28
29			>> Board type BRD_DLINKDSM <<
30stge.15	acardide.16	D-Link DSM-G600 (Rev.B only!), Conceptronic CH3WNAS
31
32			>> Board type BRD_NH230NAS <<
33re.15	iteide.16	Netronix NH-230, Allnet ALL6250, Encore ENNHD-1000,
34			Planex NAS-01G, Lindy NAS Personal Server Premium - IDE
35re.15	satalink.16	Netronix NH-231, Allnet ALL6260, Longshine LCS-8311,
36			Fujitsu-Siemens AMS150, Fujitsu-Siemens SBLAN2,
37			Vibe NS-349-S, SinanPower GigaBit LAN NAS-349,
38			Lindy NAS Personal Server Premium - SATA
39
40
41PCI line/pin and EPIC IRQ assignments
42
43		PCI IDSEL	   EPIC IRQ
44Kurobox		11, 12, 13, 14	-> 0, 1, 4, 3
45Synology	12, 13, 14, 15	-> 4, 0, 1, 2
46QNAP		13, 14, 15, 16	-> 0, 1, 2, 3
47StorCenter	13, 14, 15      -> 1, *, 0
48DLink		13, 14, 15, 16	-> 0, *, 3, 4
49NH230		13, 14, 15, 16	-> 0, 3, 1, 2
50
51- USB is a multiple function PCI device which has
52  pin assignment A (OHCI), B (OHCI) and C (EHCI).
53  Special cases (*):
54		IDSEL	Pin	   EPIC IRQ
55  DLink		14	A, B, C	-> 1, 1, 2
56  StorCenter	14	A, B, C	-> 2, 3, 4
57
58
59//// e300 NAS products ////
60
61- Freescale MPC8349E-mITXE
62
63  PCI		bus:IDSEL	IPIC IRQ
64satalink	0:16		22
65miniPCI		1:14		21
663.3vPCI		1:15		20
67
68  I2C		bus:addr
69ds1339 RTC	1:0x68
70sat MCU		1:0x0a
71
72- Thecus N1200/N3200 (MPC8347)
73
74  PCI		IDSEL		IPIC IRQ
75satalink	16		20
76
77  I2C		bus:addr
78f75375 fanctl	0:0x2e
79rs5c372a RTC	0:0x32
80sat MCU		0:0x36
81
82
83[ research still in progress ]
84
85---
86