1/* $NetBSD: frame.h,v 1.6 2023/06/23 12:11:22 skrll Exp $ */
2
3/*-
4 * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _RISCV_FRAME_H_
33#define _RISCV_FRAME_H_
34
35#include <riscv/reg.h>
36
37struct trapframe {
38	struct reg tf_regs;
39	register_t tf_tval;		// supervisor trap value
40	register_t tf_cause;		// supervisor cause register
41	register_t tf_sr;		// supervisor status register
42	register_t tf_pad;		// For 16-byte alignment
43#define tf_reg		tf_regs.r_reg
44#define tf_pc		tf_regs.r_pc
45#define tf_ra		tf_reg[_X_RA]
46#define tf_sp		tf_reg[_X_SP]
47#define tf_gp		tf_reg[_X_GP]
48#define tf_tp		tf_reg[_X_TP]
49#define tf_t0		tf_reg[_X_T0]
50#define tf_t1		tf_reg[_X_T1]
51#define tf_t2		tf_reg[_X_T2]
52#define tf_s0		tf_reg[_X_S0]
53#define tf_s1		tf_reg[_X_S1]
54#define tf_a0		tf_reg[_X_A0]
55#define tf_a1		tf_reg[_X_A1]
56#define tf_a2		tf_reg[_X_A2]
57#define tf_a3		tf_reg[_X_A3]
58#define tf_a4		tf_reg[_X_A4]
59#define tf_a5		tf_reg[_X_A5]
60#define tf_a6		tf_reg[_X_A6]
61#define tf_a7		tf_reg[_X_A7]
62#define tf_s2		tf_reg[_X_S2]
63#define tf_s3		tf_reg[_X_S3]
64#define tf_s4		tf_reg[_X_S4]
65#define tf_s5		tf_reg[_X_S5]
66#define tf_s6		tf_reg[_X_S6]
67#define tf_s7		tf_reg[_X_S7]
68#define tf_s8		tf_reg[_X_S8]
69#define tf_s9		tf_reg[_X_S9]
70#define tf_s10		tf_reg[_X_S10]
71#define tf_s11		tf_reg[_X_S11]
72#define tf_t3		tf_reg[_X_T3]
73#define tf_t4		tf_reg[_X_T4]
74#define tf_t5		tf_reg[_X_T5]
75#define tf_t6		tf_reg[_X_T6]
76};
77
78/*
79 * Ensure the trapframe is a multiple of 16bytes so that stack
80 * alignment is preserved.
81 */
82__CTASSERT((sizeof(struct trapframe) & (16 - 1)) == 0);
83
84#ifdef _LP64
85// For COMPAT_NETBSD32 coredumps
86struct trapframe32 {
87	struct reg32 tf_regs;
88	register32_t tf_tval;
89	register32_t tf_cause;
90	register32_t tf_sr;
91	register32_t tf_pad;
92};
93#endif
94
95
96#define lwp_trapframe(l) ((l)->l_md.md_utf)
97
98
99#endif /* _RISCV_FRAME_H_ */
100