1/* $NetBSD: nvram.h,v 1.10 2021/11/01 21:28:02 andvar Exp $ */ 2 3/*- 4 * Copyright (c) 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tim Rightnour 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * Based on the PowerPC Reference Platform NVRAM Specification. 34 * Document Number: PPS-AR-FW0002 35 * Jan 22, 1996 36 * Version 0.3 37 */ 38 39#ifndef _MACHINE_NVRAM_H 40#define _MACHINE_NVRAM_H 41 42#include <sys/ioccom.h> 43 44#if defined(_KERNEL) 45/* for the motorola machines */ 46#include <dev/ic/mk48txxvar.h> 47#endif 48 49#define MAX_PREP_NVRAM 0x8000 /* maximum size of the nvram */ 50 51#define NVSIZE 4096 /* standard nvram size */ 52#define OSAREASIZE 512 /* size of OSArea space */ 53#define CONFSIZE 1024 /* guess at size of configuration area */ 54 55/* 56 * The security fields are maintained by the firmware, and should be 57 * considered read-only. 58 */ 59typedef struct _SECURITY { 60 uint32_t BootErrCnt; /* count of boot password errors */ 61 uint32_t ConfigErrCnt; /* count of config password errors */ 62 uint32_t BootErrorDT[2];/* Date&Time from RTC of last error in pw */ 63 uint32_t ConfigErrorDT[2]; /* last config pw error */ 64 uint32_t BootCorrectDT[2]; /* last correct boot pw */ 65 uint32_t ConfigCorrectDT[2]; /* last correct config pw */ 66 uint32_t BootSetDT[2]; /* last set of boot pw */ 67 uint32_t ConfigSetDT[2]; /* last set of config pw */ 68 uint8_t Serial[16]; /* Box serial number */ 69} SECURITY; 70 71typedef enum _ERROR_STATUS { 72 Clear = 0, /* empty entry */ 73 Pending = 1, 74 DiagnosedOK = 2, 75 DiagnosedFail = 3, 76 Overrun = 4, 77 Logged = 5, 78} ERROR_STATUS; 79 80typedef enum _OS_ID { 81 Unknown = 0, 82 Firmware = 1, 83 AIX = 2, 84 NT = 3, 85 WPOS2 = 4, 86 WPX = 5, 87 Taligent = 6, 88 Solaris = 7, 89 Netware = 8, 90 USL = 9, 91 Low_End_Client = 10, 92 SCO = 11, 93 MK = 12, /* from linux ?? */ 94} OS_ID; 95 96/* 97 * According to IBM, if severity is severe, the OS should not boot. It should 98 * instead run diags. Umm.. whatever. 99 */ 100 101typedef struct _ERROR_LOG { 102 uint8_t Status; /* ERROR_STATUS */ 103 uint8_t Os; /* OS_ID */ 104 uint8_t Type; /* H=hardware S=software */ 105 uint8_t Severity; /* S=servere E=Error */ 106 uint32_t ErrDT[2]; /* date and time from RTC */ 107 uint8_t code[8]; /* error code */ 108 union { 109 uint8_t detail[20]; /* detail of error */ 110 } data; 111} ERROR_LOG; 112 113typedef enum _BOOT_STATUS { 114 BootStarted = 0x01, 115 BootFinished = 0x02, 116 RestartStarted = 0x04, 117 RestartFinished = 0x08, 118 PowerFailStarted = 0x10, 119 PowerFailFinished = 0x20, 120 ProcessorReady = 0x40, 121 ProcessorRunning = 0x80, 122 ProcessorStart = 0x0100 123} BOOT_STATUS; 124 125/* 126 * If the OS decided to store data in the os area of NVRAM, this tells us 127 * the last user, so we can decide if we want to re-use it or nuke it. 128 * I'm not sure what all of these do yet. 129 */ 130typedef struct _RESTART_BLOCK { 131 uint16_t Version; 132 uint16_t Revision; 133 uint32_t BootMasterId; 134 uint32_t ProcessorId; 135 volatile uint32_t BootStatus; 136 uint32_t CheckSum; /* Checksum of RESTART_BLOCK */ 137 void *RestartAddress; 138 void *SaveAreaAddr; 139 uint32_t SaveAreaLength; 140} RESTART_BLOCK; 141 142typedef enum _OSAREA_USAGE { 143 Empty = 0, 144 Used = 1, 145} OSAREA_USAGE; 146 147typedef enum _PM_MODE { 148 Suspend = 0x80, /* part of state is in memory */ 149 DirtyBit = 0x01, /* used to decide if pushbutton needs to be checked */ 150 Hibernate = 0, /* nothing is in memory */ 151} PMMODE; 152 153typedef struct _HEADER { 154 uint16_t Size; /* NVRAM size in K(1024) */ 155 uint8_t Version; /* Structure map different */ 156 uint8_t Revision; /* Structure map same */ 157 uint16_t Crc1; /* checksum from beginning of nvram to OSArea*/ 158 uint16_t Crc2; /* cksum of config */ 159 uint8_t LastOS; /* OS_ID */ 160 uint8_t Endian; /* B if BE L if LE */ 161 uint8_t OSAreaUSage; /* OSAREA_USAGE */ 162 uint8_t PMMode; /* Shutdown mode */ 163 RESTART_BLOCK RestartBlock; 164 SECURITY Security; 165 ERROR_LOG ErrorLog[2]; 166 167 /* Global Environment info */ 168 void *GEAddress; 169 uint32_t GELength; 170 uint32_t GELastWRiteDT[2]; /* last change to GE area */ 171 172 /* Configuration info */ 173 void *ConfigAddress; 174 uint32_t ConfigLength; 175 uint32_t ConfigLastWriteDT[2]; /* last change to config area */ 176 uint32_t ConfigCount; /* count of entries in configuration */ 177 178 /* OS Dependent temp area */ 179 void *OSAreaAddress; 180 uint32_t OSAreaLength; 181 uint32_t OSAreaLastWriteDT[2]; /* last change to OSArea */ 182} HEADER; 183 184typedef struct _NVRAM_MAP { 185 HEADER Header; 186 uint8_t GEArea[NVSIZE - CONFSIZE - OSAREASIZE - sizeof(HEADER)]; 187 uint8_t OSArea[OSAREASIZE]; 188 uint8_t ConfigArea[CONFSIZE]; 189} NVRAM_MAP; 190 191struct pnviocdesc { 192 int pnv_namelen; /* len of pnv_name */ 193 char *pnv_name; /* node name */ 194 int pnv_buflen; /* len of pnv_bus */ 195 char *pnv_buf; /* option value result */ 196 int pnv_num; /* number of something */ 197}; 198 199#define DEV_NVRAM 0 200#define DEV_RESIDUAL 1 201 202#if defined(_KERNEL) 203struct prep_mk48txx_softc { 204 device_t *sc_dev; 205 bus_space_tag_t sc_bst; /* bus tag & handle */ 206 bus_space_handle_t sc_bsh; /* */ 207 208 struct todr_chip_handle sc_handle; /* TODR handle */ 209 const char *sc_model; /* chip model name */ 210 bus_size_t sc_nvramsz; /* Size of NVRAM on the chip */ 211 bus_size_t sc_clkoffset; /* Offset in NVRAM to clock bits */ 212 u_int sc_year0; /* What year is represented on 213 the system by the chip's year 214 counter at 0 */ 215 u_int sc_flag; 216#define MK48TXX_NO_CENT_ADJUST 0x0001 217 218 mk48txx_nvrd_t sc_nvrd; /* NVRAM/RTC read function */ 219 mk48txx_nvwr_t sc_nvwr; /* NVRAM/RTC write function */ 220 bus_space_tag_t sc_data; 221 bus_space_handle_t sc_datah; 222}; 223 224struct nvram_pnpbus_softc { 225 bus_space_tag_t sc_iot; /* io space tag */ 226 bus_space_tag_t sc_as; /* addr line */ 227 bus_space_handle_t sc_ash; 228 bus_space_handle_t sc_ashs[2]; 229 230 bus_space_tag_t sc_data; /* data line */ 231 bus_space_handle_t sc_datah; 232 233 /* clock bits for mk48txx */ 234 struct prep_mk48txx_softc sc_mksc; /* mk48txx softc */ 235 236 u_char sc_open; /* single use device */ 237}; 238 239#endif /* _KERNEL */ 240 241#define PNVIOCGET _IOWR('O', 1, struct pnviocdesc) /* get var contents */ 242#define PNVIOCGETNEXTNAME _IOWR('O', 2, struct pnviocdesc) /* get next var */ 243#define PNVIOCGETNUMGE _IOWR('O', 3, struct pnviocdesc) /* get nrof vars */ 244#define PNVIOCSET _IOW('O', 4, struct pnviocdesc) /* set nvram var */ 245 246#endif /* _MACHINE_NVRAM_H */ 247