1/* $NetBSD: tlb.h,v 1.7 2021/03/30 03:15:53 rin Exp $ */ 2 3/* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#ifndef _IBM4XX_TLB_H_ 39#define _IBM4XX_TLB_H_ 40 41#define NTLB 64 42 43/* TLBHI entries */ 44#define TLB_EPN_MASK 0xfffff000 /* It's 0xfffffc00, but as we use 4K pages we don't need two lower bits */ 45#define TLB_EPN_SHFT 12 46#define TLB_SIZE_MASK 0x00000380 47#define TLB_SIZE_SHFT 7 48#define TLB_VALID 0x00000040 49#define TLB_ENDIAN 0x00000020 50#define TLB_U0 0x00000010 51 52#define TLB_SIZE_1K 0 53#define TLB_SIZE_4K 1 54#define TLB_SIZE_16K 2 55#define TLB_SIZE_64K 3 56#define TLB_SIZE_256K 4 57#define TLB_SIZE_1M 5 58#define TLB_SIZE_4M 6 59#define TLB_SIZE_16M 7 60 61#define TLB_PG_1K (TLB_SIZE_1K << TLB_SIZE_SHFT) 62#define TLB_PG_4K (TLB_SIZE_4K << TLB_SIZE_SHFT) 63#define TLB_PG_16K (TLB_SIZE_16K << TLB_SIZE_SHFT) 64#define TLB_PG_64K (TLB_SIZE_64K << TLB_SIZE_SHFT) 65#define TLB_PG_256K (TLB_SIZE_256K << TLB_SIZE_SHFT) 66#define TLB_PG_1M (TLB_SIZE_1M << TLB_SIZE_SHFT) 67#define TLB_PG_4M (TLB_SIZE_4M << TLB_SIZE_SHFT) 68#define TLB_PG_16M (TLB_SIZE_16M << TLB_SIZE_SHFT) 69 70/* TLBLO entries */ 71#define TLB_RPN_MASK 0xfffffc00 /* Real Page Number mask */ 72#define TLB_EX 0x00000200 /* EXecute enable */ 73#define TLB_WR 0x00000100 /* WRite enable */ 74#define TLB_ZSEL_MASK 0x000000f0 /* Zone SELect mask */ 75#define TLB_ZSEL_SHFT 4 76#define TLB_W 0x00000008 /* Write-through */ 77#define TLB_I 0x00000004 /* Inhibit caching */ 78#define TLB_M 0x00000002 /* Memory coherent */ 79#define TLB_G 0x00000001 /* Guarded */ 80 81#define TLB_ZONE(z) (((z) << TLB_ZSEL_SHFT) & TLB_ZSEL_MASK) 82 83/* We only need two zones for kernel and user-level processes */ 84#define TLB_SU_ZONE 0 /* Kernel-only access controlled permission bits in TLB */ 85#define TLB_U_ZONE 1 /* Access always controlled by permission bits in TLB entry */ 86 87#define TLB_HI(epn,size,flags) (((epn)&TLB_EPN_MASK)|(((size)<<TLB_SIZE_SHFT)&TLB_SIZE_MASK)|(flags)) 88#define TLB_LO(rpn,zone,flags) (((rpn)&TLB_RPN_MASK)|(((zone)<<TLB_ZSEL_SHFT)&TLB_ZSEL_MASK)|(flags)) 89 90#ifndef _LOCORE 91 92typedef struct tlb_s { 93 u_int tlb_hi; 94 u_int tlb_lo; 95} tlb_t; 96 97struct pmap; 98 99void ppc4xx_tlb_enter(int, vaddr_t, u_int); 100void ppc4xx_tlb_flush(vaddr_t, int); 101void ppc4xx_tlb_flush_all(void); 102void ppc4xx_tlb_init(void); 103int ppc4xx_tlb_new_pid(struct pmap *); 104void ppc4xx_tlb_reserve(paddr_t, vaddr_t, size_t, int); 105void *ppc4xx_tlb_mapiodev(paddr_t, psize_t); 106 107#ifndef ppc4xx_tlbflags 108#define ppc4xx_tlbflags(va, pa) (0) 109#endif 110 111#endif /* !_LOCORE */ 112 113#define TLB_PID_INVALID 0xFFFF 114 115#endif /* _IBM4XX_TLB_H_ */ 116