1/*	$NetBSD: timer.c,v 1.10 2023/11/23 20:40:08 andvar Exp $	*/
2
3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: timer.c,v 1.10 2023/11/23 20:40:08 andvar Exp $");
34
35#include "debug_playstation2.h"
36
37#include <sys/intr.h>
38#include <sys/param.h>
39#include <sys/systm.h>
40
41#include <playstation2/playstation2/interrupt.h>
42
43#include <playstation2/ee/eevar.h>
44#include <playstation2/ee/intcvar.h>
45#include <playstation2/ee/timervar.h>
46#include <playstation2/ee/timerreg.h>
47
48
49#ifdef DEBUG
50#define STATIC
51#else
52#define STATIC static
53#endif
54
55STATIC int timer0_intr(void *);
56
57/*
58 * EE timer usage
59 *	0 ... 100 Hz clock interrupt.
60 *      1 ... one shot interrupt for software interrupt for IPL_SOFT
61 *	2 ... for IPL_SOFTCLOCK
62 *	3 ... for IPL_SOFTNET, IPL_SOFTSERIAL
63 */
64
65void
66timer_init(void)
67{
68
69	_reg_write_4(T0_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
70	_reg_write_4(T1_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
71	_reg_write_4(T2_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
72	_reg_write_4(T3_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
73}
74
75void
76timer_clock_init(void)
77{
78	/* clock interrupt (296.912MHz / 2 / 256) * 5760 = 100Hz */
79	intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0);
80	_reg_write_4(T0_COUNT_REG, 0);
81	_reg_write_4(T0_COMP_REG, 5760);
82	_reg_write_4(T0_MODE_REG, T_MODE_CLKS_BUSCLK256 | T_MODE_ZRET |
83	    T_MODE_CUE | T_MODE_CMPE);
84}
85
86void
87timer_one_shot(int timer)
88{
89	KDASSERT(LEGAL_TIMER(timer) && timer != 0);
90
91	_reg_write_4(T_COUNT_REG(timer), 0);
92	_reg_write_4(T_COMP_REG(timer), 1);
93	_reg_write_4(T_MODE_REG(timer), T_MODE_CUE | T_MODE_CMPE);
94}
95
96/*
97 * interrupt handler for clock interrupt (100Hz)
98 */
99int
100timer0_intr(void *arg)
101{
102
103	_reg_write_4(T0_MODE_REG, _reg_read_4(T0_MODE_REG) | T_MODE_EQUF);
104
105	_playstation2_evcnt.clock.ev_count++;
106
107	hardclock(&playstation2_clockframe);
108
109	return (1);
110}
111
112/* one shot timer interrupt for software interrupt */
113int
114timer1_intr(void *arg)
115{
116
117	_reg_write_4(T1_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
118
119#ifdef __HAVE_FAST_SOFTINTS
120	softintr_dispatch(0); /* IPL_SOFTCLOCK */
121#endif
122
123	return (1);
124}
125
126int
127timer2_intr(void *arg)
128{
129
130	_reg_write_4(T2_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
131
132#ifdef __HAVE_FAST_SOFTINTS
133	softintr_dispatch(1); /* IPL_SOFTBIO */
134#endif
135	return (1);
136}
137
138int
139timer3_intr(void *arg)
140{
141
142	_reg_write_4(T3_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
143
144#ifdef __HAVE_FAST_SOFTINTS
145	softintr_dispatch(3); /* IPL_SOFTSERIAL */
146	softintr_dispatch(2); /* IPL_SOFTNET */
147#endif
148
149	return (1);
150}
151