1/* $NetBSD$ */ 2/* 3 * Copyright (c) 2011 KIYOHARA Takashi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sh3/asm.h> 29#include <sh3/locore.h> 30#include <sh3/mmu_sh3.h> 31#include <sh3/mmu_sh4.h> 32 33#if defined(SH3) && defined(SH4) 34#error "mmeye port don't support SH3,SH4 common kernel." 35#elif defined(SH3) 36#define RAM_BEGIN 0x8c000000 /* Area3 */ 37#define RAM_SIZE 0x01000000 /* 16M */ 38#elif defined(SH4) 39#define RAM_BEGIN 0x88000000 /* Area2 */ 40#define RAM_SIZE 0x04000000 /* 64M */ 41#endif 42 43#define INIT_STACK (RAM_BEGIN + RAM_SIZE - 0x00001000) 44 45NENTRY(start) 46 /* Set SP to initial position */ 47 mov.l XLtmpstk, r15 48 49 __INTR_MASK(r0, r1) 50 51 /* Set Register Bank to Bank 0 */ 52 mov.l SR_init, r0 53 ldc r0, sr 54 55 xor r0, r0 56 MOV (MMUCR, r2) 57 mov.l r0, @r2 /* MMU OFF */ 58 59 bra start1 60 nop 61 .align 2 62SR_init: .long 0x500000F0 63REG_SYMBOL(MMUCR) 64start1: 65 66#if defined(SH4) 67 /* Copy boot image from _LOADADDR to ___start */ 68 mov.l _LOADADDR, r1 69 mov.l ___end, r0 70 mov.l ___start, r3 71 sub r3, r0 72 add #4, r0 /* size of bytes to be copied */ 73 shlr2 r0 /* number of long word */ 741: 75 mov.l @r1+, r4 76 mov.l r4, @r3 77 add #4, r3 78 dt r0 /* decrement and Test */ 79 bf 1b 80 /* boot image copy end */ 81#endif 82 83 mov.l XLmain, r0 84 jmp @r0 /* jump to main() */ 85 nop 86 87 .align 2 88 89_LOADADDR: .long 0x88010000 /* loaded here by 1st loader. */ 90___start: .long start 91___end: .long _end 92XLtmpstk: .long INIT_STACK 93XLmain: .long _C_LABEL(main) 94