1/* $NetBSD: sbbrz_bus_io.c,v 1.1.2.2 2010/01/21 08:50:00 matt Exp $ */ 2 3/*- 4 * Copyright (c) 2001, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * Platform-specific PCI bus I/O support for the BCM1250/BCM1125. 34 */ 35 36#include <sys/cdefs.h> 37__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_io.c,v 1.1.2.2 2010/01/21 08:50:00 matt Exp $"); 38 39#include <sys/param.h> 40 41#include <mips/sibyte/include/sb1250_regs.h> 42#include <mips/sibyte/pci/sbbrzvar.h> 43 44#define CHIP sbbrz 45#define CHIP_IO /* defined */ 46#define CHIP_LITTLE_ENDIAN 47 48#define CHIP_EX_MALLOC_SAFE(v) true 49#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_io_ex) 50 51/* IO region 1 */ 52#define CHIP_W1_BUS_START(v) 0x00008000UL 53#define CHIP_W1_BUS_END(v) 0x02000000UL 54#define CHIP_W1_SYS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_START(v)) 55#define CHIP_W1_SYS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_END(v)) 56 57#include <mips/mips/bus_space_alignstride_chipdep.c> 58