1### 2### SBMIPS DEVICES 3### 4 5# System Control/Debug 6device sbscd {[offset = -1], [intr[2] = {-1,-1}]} 7attach sbscd at zbbus 8file arch/mips/sibyte/dev/sbscd.c sbscd 9 10# On-board I/O (slow I/O bridge) 11device sbobio {[offset = -1], [intr[2] = {-1,-1}]} 12attach sbobio at zbbus 13file arch/mips/sibyte/dev/sbobio.c sbobio 14 15# Generic bus, hang off of sbobio 16device sbgbus {[chipsel = -1], [offset = 0], [intr[2] = {-1,-1}]} 17attach sbgbus at sbobio 18file arch/mips/sibyte/dev/sbgbus.c sbgbus 19 20# I/O Bridge Zero attachment to ZBbus 21device sbbrz: pcibus 22attach sbbrz at zbbus 23file arch/mips/sibyte/pci/sbbrz.c sbbrz 24file arch/mips/sibyte/pci/sbbrz_pci.c sbbrz 25file arch/mips/sibyte/pci/sbbrz_bus_io.c sbbrz 26file arch/mips/sibyte/pci/sbbrz_bus_mem.c sbbrz 27 28 29# sbscd children 30 31device sbtimer 32attach sbtimer at sbscd 33file arch/mips/sibyte/dev/sbtimer.c sbtimer 34 35device sbwdog: sysmon_wdog 36attach sbwdog at sbscd 37file arch/mips/sibyte/dev/sbwdog.c sbwdog 38 39# sbobio children 40 41# SB1250 MAC (XXX: maybe add mii_bitbang?) 42device sbmac: arp, ether, ifnet, mii, mii_bitbang 43attach sbmac at sbobio 44file arch/mips/sibyte/dev/sbmac.c sbmac 45 46# SB1250 built-in (asynchronous) serial ports 47device sbscn: tty 48attach sbscn at sbobio 49file arch/mips/sibyte/dev/sbscn.c sbscn needs-flag 50 51# XXX XXX 52# need to think about SMBus more, just hack something together 53# temporariliy so we can use the RTC. 54 55# SB1250 SMBus 56device smbus {[chan = -1], [dev = -1]} 57attach smbus at sbobio 58file arch/mips/sibyte/dev/sbsmbus.c smbus 59 60# XXX XXX 61# XXX also, this should be in sbmips/conf/files.sbmips 62# Bogus RTC attachment 63device xirtc 64attach xirtc at smbus 65 66device m41t81rtc 67attach m41t81rtc at smbus 68 69# XXX move to arch/mips/sibyte? 70file arch/evbmips/sbmips/rtc.c xirtc | m41t81rtc 71 72file arch/mips/sibyte/dev/sbbuswatch.c 73