1/*	$NetBSD: viareg.h,v 1.8 2009/03/14 14:46:01 dsl Exp $	*/
2
3/*-
4 * Copyright (C) 1993	Allen K. Briggs, Chris P. Caputo,
5 *			Michael L. Finch, Bradley A. Grantham, and
6 *			Lawrence A. Kesteloot
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by the Alice Group.
20 * 4. The names of the Alice Group or any of its members may not be used
21 *    to endorse or promote products derived from this software without
22 *    specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 */
36/*
37
38	Prototype VIA control definitions
39
40	06/04/92,22:33:57 BG Let's see what I can do.
41
42*/
43
44
45	/* VIA1 data register A */
46#define DA1I_vSCCWrReq	0x80
47#define DA1O_vPage2	0x40
48#define DA1I_CPU_ID1	0x40
49#define DA1O_vHeadSel	0x20
50#define DA1O_vOverlay	0x10
51#define DA1O_vSync	0x08
52#define DA1O_RESERVED2	0x04
53#define DA1O_RESERVED1	0x02
54#define DA1O_RESERVED0	0x01
55
56	/* VIA1 data register B */
57#define DB1I_Par_Err	0x80
58#define DB1O_vSndEnb	0x80
59#define DB1O_Par_Enb	0x40
60#define DB1O_vFDesk2	0x20
61#define DB1O_vFDesk1	0x10
62#define DB1I_vFDBInt	0x08
63#define DB1O_rTCEnb	0x04
64#define DB1O_rTCCLK	0x02
65#define DB1O_rTCData	0x01
66#define DB1I_rTCData	0x01
67
68	/* VIA2 data register A */
69#define DA2O_v2Ram1	0x80
70#define DA2O_v2Ram0	0x40
71#define DA2I_v2IRQ0	0x40
72#define DA2I_v2IRQE	0x20
73#define DA2I_v2IRQD	0x10
74#define DA2I_v2IRQC	0x08
75#define DA2I_v2IRQB	0x04
76#define DA2I_v2IRQA	0x02
77#define DA2I_v2IRQ9	0x01
78
79	/* VIA2 data register B */
80#define DB2O_v2VBL	0x80
81#define DB2O_Par_Test	0x80
82#define DB2I_v2SNDEXT	0x40
83#define DB2I_v2TM0A	0x20
84#define DB2I_v2TM1A	0x10
85#define DB2I_vFC3	0x08
86#define DB2O_vFC3	0x08
87#define DB2O_v2PowerOff	0x04
88#define DB2O_v2BusLk	0x02
89#define DB2O_vCDis	0x01
90#define DB2O_CEnable	0x01
91
92/*
93 * VIA1 interrupts
94 */
95#define	VIA1_T1		6
96#define	VIA1_T2		5
97#define	VIA1_ADBCLK	4
98#define	VIA1_ADBDATA	3
99#define	VIA1_ADBRDY	2
100#define	VIA1_VBLNK	1
101#define	VIA1_ONESEC	0
102
103/* VIA1 interrupt bits */
104#define V1IF_IRQ	0x80
105#define V1IF_T1		(1 << VIA1_T1)
106#define V1IF_T2		(1 << VIA1_T2)
107#define V1IF_ADBCLK	(1 << VIA1_ADBCLK)
108#define V1IF_ADBDATA	(1 << VIA1_ADBDATA)
109#define V1IF_ADBRDY	(1 << VIA1_ADBRDY)
110#define V1IF_VBLNK	(1 << VIA1_VBLNK)
111#define V1IF_ONESEC	(1 << VIA1_ONESEC)
112
113/*
114 * VIA2 interrupts
115 */
116#define VIA2_T1		6
117#define VIA2_T2		5
118#define VIA2_ASC	4
119#define VIA2_SCSIIRQ	3
120#define VIA2_EXPIRQ	2
121#define VIA2_SLOTINT	1
122#define VIA2_SCSIDRQ	0
123
124/* VIA2 interrupt bits */
125#define	V2IF_IRQ	0x80
126#define	V2IF_T1		(1 << VIA2_T1)
127#define	V2IF_T2		(1 << VIA2_T2)
128#define	V2IF_ASC	(1 << VIA2_ASC)
129#define	V2IF_SCSIIRQ	(1 << VIA2_SCSIIRQ)
130#define	V2IF_EXPIRQ	(1 << VIA2_EXPIRQ)
131#define	V2IF_SLOTINT	(1 << VIA2_SLOTINT)
132#define	V2IF_SCSIDRQ	(1 << VIA2_SCSIDRQ)
133
134#define VIA1_INTS	(V1IF_T1 | V1IF_ADBRDY)
135#define VIA2_INTS	(V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \
136			 V2IF_SCSIDRQ)
137
138#define RBV_INTS	(V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \
139			 V2IF_SCSIDRQ | V1IF_ADBRDY)
140
141#define ACR_T1LATCH	0x40
142
143extern volatile unsigned char *Via1Base;
144#define VIA1_addr	Via1Base	/* at PA 0x50f00000 */
145#define VIA2OFF		1		/* VIA2 addr = VIA1_addr * 0x2000 */
146#define RBVOFF		0x13		/* RBV addr = VIA1_addr * 0x13000 */
147
148#define VIA1		0
149#define VIA2		0
150
151	/* VIA interface registers */
152#define vBufB		0x0000	/* register B */
153#define vBufA		0x0200	/* register A */
154#define vDirB		0x0400	/* data direction register */
155#define vDirA		0x0600	/* data direction register */
156#define vT1C		0x0800
157#define vT1CH		0x0a00
158#define vT1L		0x0c00
159#define vT1LH		0x0e00
160#define vT2C		0x1000
161#define vT2CH		0x1200
162#define vSR		0x1400	/* shift register */
163#define vACR		0x1600	/* aux control register */
164#define vPCR		0x1800	/* peripheral control register */
165#define vIFR		0x1a00	/* interrupt flag register */
166#define vIER		0x1c00	/* interrupt enable register */
167
168	/* RBV interface registers */
169#define rBufB		0	/* register B */
170#define rBufA		2	/* register A */
171#define rIFR		0x3	/* interrupt flag register (writes?) */
172#define rIER		0x13	/* interrupt enable register */
173#define rMonitor	0x10	/* Monitor type */
174#define rSlotInt	0x12	/* Slot interrupt */
175
176	/* RBV monitor type flags and masks */
177#define RBVDepthMask	0x07	/* depth in bits */
178#define RBVMonitorMask	0x38	/* Type numbers */
179#define RBVOff		0x40	/* monitor turn off */
180#define RBVMonIDNone	0x38	/* What RBV actually has for no video */
181#define RBVMonIDOff	0x0	/* What rbv_vidstatus() returns for no video */
182#define RBVMonID15BWP	0x08	/* BW portrait */
183#define RBVMonIDRGB	0x10	/* color monitor */
184#define RBVMonIDRGB15	0x28	/* 15 inch RGB */
185#define RBVMonIDBW	0x30	/* No internal video */
186
187/* some misc. leftovers */
188#define vPB		0x0000
189#define vPB3		0x08
190#define vPB4		0x10
191#define vPB5		0x20
192#define vSR_INT		0x04
193#define vSR_OUT		0x10
194
195#define via_reg(v, r) (*(Via1Base + (r)))
196
197static inline void via_reg_and(int, int, int);
198static inline void via_reg_or(int, int, int);
199static inline void via_reg_xor(int, int, int);
200static inline void write_via_reg(int, int, int);
201static inline int read_via_reg(int, int);
202
203static inline void
204via_reg_and(int ign, int reg, int val)
205{
206	volatile uint8_t *addr = Via1Base + reg;
207
208	out8(addr, in8(addr) & val);
209}
210
211static inline void
212via_reg_or(int ign, int reg, int val)
213{
214	volatile uint8_t *addr = Via1Base + reg;
215
216	out8(addr, in8(addr) | val);
217}
218
219static inline void
220via_reg_xor(int ign, int reg, int val)
221{
222	volatile uint8_t *addr = Via1Base + reg;
223
224	out8(addr, in8(addr) ^ val);
225}
226
227static inline int
228read_via_reg(int ign, int reg)
229{
230	volatile uint8_t *addr = Via1Base + reg;
231
232	return in8(addr);
233}
234
235static inline void
236write_via_reg(int ign, int reg, int val)
237{
238	volatile uint8_t *addr = Via1Base + reg;
239
240	out8(addr, val);
241}
242
243
244
245#define vDirA_ADBState	0x30
246
247void	via_init(void);
248int	rbv_vidstatus(void);
249void	via_shutdown(void);
250void	via_set_modem(int);
251int	add_nubus_intr(int, void (*)(void *, int), void *);
252void	enable_nubus_intr(void);
253void	via1_register_irq(int, void (*)(void *), void *);
254void	via2_register_irq(int, void (*)(void *), void *);
255
256extern void	(*via1itab[7])(void *);
257extern void	(*via2itab[7])(void *);
258