1/* $NetBSD: if_bm.c,v 1.65 2022/09/18 10:59:22 thorpej Exp $ */ 2 3/*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.65 2022/09/18 10:59:22 thorpej Exp $"); 31 32#include "opt_inet.h" 33 34#include <sys/param.h> 35#include <sys/device.h> 36#include <sys/ioctl.h> 37#include <sys/kernel.h> 38#include <sys/mbuf.h> 39#include <sys/socket.h> 40#include <sys/systm.h> 41#include <sys/callout.h> 42 43#include <uvm/uvm_extern.h> 44 45#include <net/if.h> 46#include <net/if_dl.h> 47#include <net/if_ether.h> 48#include <net/if_media.h> 49 50#include <net/bpf.h> 51 52#ifdef INET 53#include <netinet/in.h> 54#include <netinet/if_inarp.h> 55#endif 56 57 58#include <dev/ofw/openfirm.h> 59 60#include <dev/mii/mii.h> 61#include <dev/mii/miivar.h> 62#include <dev/mii/mii_bitbang.h> 63 64#include <powerpc/spr.h> 65#include <powerpc/oea/spr.h> 66 67#include <machine/autoconf.h> 68#include <machine/pio.h> 69 70#include <macppc/dev/dbdma.h> 71#include <macppc/dev/if_bmreg.h> 72#include <macppc/dev/obiovar.h> 73 74#define BMAC_TXBUFS 2 75#define BMAC_RXBUFS 16 76#define BMAC_BUFLEN 2048 77 78struct bmac_softc { 79 device_t sc_dev; 80 struct ethercom sc_ethercom; 81#define sc_if sc_ethercom.ec_if 82 struct callout sc_tick_ch; 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 dbdma_regmap_t *sc_txdma; 86 dbdma_regmap_t *sc_rxdma; 87 dbdma_command_t *sc_txcmd; 88 dbdma_command_t *sc_rxcmd; 89 void *sc_txbuf; 90 void *sc_rxbuf; 91 int sc_rxlast; 92 int sc_flags; 93 bool sc_txbusy; 94 struct mii_data sc_mii; 95 u_char sc_enaddr[6]; 96}; 97 98#define BMAC_BMACPLUS 0x01 99#define BMAC_DEBUGFLAG 0x02 100 101int bmac_match(device_t, cfdata_t, void *); 102void bmac_attach(device_t, device_t, void *); 103void bmac_reset_chip(struct bmac_softc *); 104void bmac_init(struct bmac_softc *); 105void bmac_init_dma(struct bmac_softc *); 106int bmac_intr(void *); 107int bmac_rint(void *); 108void bmac_reset(struct bmac_softc *); 109void bmac_stop(struct bmac_softc *); 110void bmac_start(struct ifnet *); 111void bmac_transmit_packet(struct bmac_softc *, void *, int); 112int bmac_put(struct bmac_softc *, void *, struct mbuf *); 113struct mbuf *bmac_get(struct bmac_softc *, void *, int); 114void bmac_watchdog(struct ifnet *); 115int bmac_ioctl(struct ifnet *, u_long, void *); 116void bmac_setladrf(struct bmac_softc *); 117 118int bmac_mii_readreg(device_t, int, int, uint16_t *); 119int bmac_mii_writereg(device_t, int, int, uint16_t); 120void bmac_mii_statchg(struct ifnet *); 121void bmac_mii_tick(void *); 122uint32_t bmac_mbo_read(device_t); 123void bmac_mbo_write(device_t, uint32_t); 124 125CFATTACH_DECL_NEW(bm, sizeof(struct bmac_softc), 126 bmac_match, bmac_attach, NULL, NULL); 127 128const struct mii_bitbang_ops bmac_mbo = { 129 bmac_mbo_read, bmac_mbo_write, 130 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 131}; 132 133static inline uint16_t 134bmac_read_reg(struct bmac_softc *sc, bus_size_t off) 135{ 136 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off); 137} 138 139static inline void 140bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val) 141{ 142 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val); 143} 144 145static inline void 146bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 147{ 148 val |= bmac_read_reg(sc, off); 149 bmac_write_reg(sc, off, val); 150} 151 152static inline void 153bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 154{ 155 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 156} 157 158int 159bmac_match(device_t parent, cfdata_t cf, void *aux) 160{ 161 struct confargs *ca = aux; 162 163 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 164 return 0; 165 166 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 167 return 1; 168 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 169 return 1; 170 171 return 0; 172} 173 174void 175bmac_attach(device_t parent, device_t self, void *aux) 176{ 177 struct confargs *ca = aux; 178 struct bmac_softc *sc = device_private(self); 179 struct ifnet *ifp = &sc->sc_if; 180 struct mii_data *mii = &sc->sc_mii; 181 u_char laddr[6]; 182 char intr_xname[INTRDEVNAMEBUF]; 183 184 callout_init(&sc->sc_tick_ch, 0); 185 186 sc->sc_dev = self; 187 sc->sc_flags = 0; 188 if (strcmp(ca->ca_name, "ethernet") == 0) { 189 char name[64]; 190 191 memset(name, 0, 64); 192 OF_package_to_path(ca->ca_node, name, sizeof(name)); 193 OF_open(name); 194 sc->sc_flags |= BMAC_BMACPLUS; 195 } 196 197 ca->ca_reg[0] += ca->ca_baseaddr; 198 ca->ca_reg[2] += ca->ca_baseaddr; 199 ca->ca_reg[4] += ca->ca_baseaddr; 200 201 sc->sc_iot = ca->ca_tag; 202 if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0, 203 &sc->sc_ioh) != 0) { 204 aprint_error(": couldn't map %#x", ca->ca_reg[0]); 205 return; 206 } 207 208 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 209 210 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 211 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 212 aprint_error(": cannot get mac-address\n"); 213 return; 214 } 215 memcpy(sc->sc_enaddr, laddr, 6); 216 217 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE, false); 218 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE, false); 219 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t), NULL); 220 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t), 221 NULL); 222 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_WAITOK); 223 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_WAITOK); 224 225 aprint_normal(" irq %d,%d: address %s\n", 226 ca->ca_intr[0], ca->ca_intr[2], 227 ether_sprintf(laddr)); 228 229 snprintf(intr_xname, sizeof(intr_xname), "%s tx", device_xname(self)); 230 intr_establish_xname(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc, 231 intr_xname); 232 233 snprintf(intr_xname, sizeof(intr_xname), "%s rx", device_xname(self)); 234 intr_establish_xname(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc, 235 intr_xname); 236 237 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 238 ifp->if_softc = sc; 239 ifp->if_ioctl = bmac_ioctl; 240 ifp->if_start = bmac_start; 241 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 242 ifp->if_watchdog = bmac_watchdog; 243 IFQ_SET_READY(&ifp->if_snd); 244 245 mii->mii_ifp = ifp; 246 mii->mii_readreg = bmac_mii_readreg; 247 mii->mii_writereg = bmac_mii_writereg; 248 mii->mii_statchg = bmac_mii_statchg; 249 250 sc->sc_ethercom.ec_mii = mii; 251 ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus); 252 mii_attach(sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 253 254 /* Choose a default media. */ 255 if (LIST_FIRST(&mii->mii_phys) == NULL) { 256 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_10_T, 0, NULL); 257 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_10_T); 258 } else 259 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 260 261 bmac_reset_chip(sc); 262 263 if_attach(ifp); 264 if_deferred_start_init(ifp, NULL); 265 ether_ifattach(ifp, sc->sc_enaddr); 266} 267 268/* 269 * Reset and enable bmac by heathrow FCR. 270 */ 271void 272bmac_reset_chip(struct bmac_softc *sc) 273{ 274 u_int v; 275 276 dbdma_reset(sc->sc_txdma); 277 dbdma_reset(sc->sc_rxdma); 278 279 v = obio_read_4(HEATHROW_FCR); 280 281 v |= EnetEnable; 282 obio_write_4(HEATHROW_FCR, v); 283 delay(50000); 284 285 v |= ResetEnetCell; 286 obio_write_4(HEATHROW_FCR, v); 287 delay(50000); 288 289 v &= ~ResetEnetCell; 290 obio_write_4(HEATHROW_FCR, v); 291 delay(50000); 292 293 obio_write_4(HEATHROW_FCR, v); 294} 295 296void 297bmac_init(struct bmac_softc *sc) 298{ 299 struct ifnet *ifp = &sc->sc_if; 300 struct ether_header *eh; 301 void *data; 302 int i, tb; 303 uint16_t bmcr; 304 u_short *p; 305 306 bmac_reset_chip(sc); 307 308 /* XXX */ 309 bmac_mii_readreg(sc->sc_dev, 0, MII_BMCR, &bmcr); 310 bmcr &= ~BMCR_ISO; 311 bmac_mii_writereg(sc->sc_dev, 0, MII_BMCR, bmcr); 312 313 bmac_write_reg(sc, RXRST, RxResetValue); 314 bmac_write_reg(sc, TXRST, TxResetBit); 315 316 /* Wait for reset completion. */ 317 for (i = 1000; i > 0; i -= 10) { 318 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 319 break; 320 delay(10); 321 } 322 if (i <= 0) 323 printf("%s: reset timeout\n", ifp->if_xname); 324 325 if (! (sc->sc_flags & BMAC_BMACPLUS)) 326 bmac_set_bits(sc, XCVRIF, ClkBit | SerialMode | COLActiveLow); 327 328 if ((mfpvr() >> 16) == MPC601) 329 tb = mfrtcl(); 330 else 331 tb = mftbl(); 332 bmac_write_reg(sc, RSEED, tb); 333 bmac_set_bits(sc, XIFC, TxOutputEnable); 334 bmac_read_reg(sc, PAREG); 335 336 /* Reset various counters. */ 337 bmac_write_reg(sc, NCCNT, 0); 338 bmac_write_reg(sc, NTCNT, 0); 339 bmac_write_reg(sc, EXCNT, 0); 340 bmac_write_reg(sc, LTCNT, 0); 341 bmac_write_reg(sc, FRCNT, 0); 342 bmac_write_reg(sc, LECNT, 0); 343 bmac_write_reg(sc, AECNT, 0); 344 bmac_write_reg(sc, FECNT, 0); 345 bmac_write_reg(sc, RXCV, 0); 346 347 /* Set tx fifo information. */ 348 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 349 350 bmac_write_reg(sc, TXFIFOCSR, 0); 351 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 352 353 /* Set rx fifo information. */ 354 bmac_write_reg(sc, RXFIFOCSR, 0); 355 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 356 357 /* Clear status register. */ 358 bmac_read_reg(sc, STATUS); 359 360 bmac_write_reg(sc, HASH3, 0); 361 bmac_write_reg(sc, HASH2, 0); 362 bmac_write_reg(sc, HASH1, 0); 363 bmac_write_reg(sc, HASH0, 0); 364 365 /* Set MAC address. */ 366 p = (u_short *)sc->sc_enaddr; 367 bmac_write_reg(sc, MADD0, *p++); 368 bmac_write_reg(sc, MADD1, *p++); 369 bmac_write_reg(sc, MADD2, *p); 370 371 bmac_write_reg(sc, RXCFG, 372 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 373 374 if (ifp->if_flags & IFF_PROMISC) 375 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 376 377 bmac_init_dma(sc); 378 379 /* Enable TX/RX */ 380 bmac_set_bits(sc, RXCFG, RxMACEnable); 381 bmac_set_bits(sc, TXCFG, TxMACEnable); 382 383 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 384 385 ifp->if_flags |= IFF_RUNNING; 386 sc->sc_txbusy = false; 387 ifp->if_timer = 0; 388 389 data = sc->sc_txbuf; 390 eh = (struct ether_header *)data; 391 392 memset(data, 0, sizeof(eh) + ETHERMIN); 393 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 394 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 395 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 396 397 bmac_start(ifp); 398 399 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 400} 401 402void 403bmac_init_dma(struct bmac_softc *sc) 404{ 405 dbdma_command_t *cmd = sc->sc_rxcmd; 406 int i; 407 408 dbdma_reset(sc->sc_txdma); 409 dbdma_reset(sc->sc_rxdma); 410 411 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 412 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 413 414 for (i = 0; i < BMAC_RXBUFS; i++) { 415 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 416 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 417 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 418 cmd++; 419 } 420 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 421 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 422 out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 423 424 sc->sc_rxlast = 0; 425 426 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 427} 428 429int 430bmac_intr(void *v) 431{ 432 struct bmac_softc *sc = v; 433 int stat; 434 435 stat = bmac_read_reg(sc, STATUS); 436 if (stat == 0) 437 return 0; 438 439#ifdef BMAC_DEBUG 440 printf("bmac_intr status = 0x%x\n", stat); 441#endif 442 443 if (stat & IntFrameSent) { 444 sc->sc_txbusy = false; 445 sc->sc_if.if_timer = 0; 446 if_statinc(&sc->sc_if, if_opackets); 447 if_schedule_deferred_start(&sc->sc_if); 448 } 449 450 /* XXX should do more! */ 451 452 return 1; 453} 454 455int 456bmac_rint(void *v) 457{ 458 struct bmac_softc *sc = v; 459 struct ifnet *ifp = &sc->sc_if; 460 struct mbuf *m; 461 dbdma_command_t *cmd; 462 int status, resid, count, datalen; 463 int i, n; 464 void *data; 465 466 i = sc->sc_rxlast; 467 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 468 if (i == BMAC_RXBUFS) 469 i = 0; 470 cmd = &sc->sc_rxcmd[i]; 471 status = in16rb(&cmd->d_status); 472 resid = in16rb(&cmd->d_resid); 473 474#ifdef BMAC_DEBUG 475 if (status != 0 && status != 0x8440 && status != 0x9440) 476 printf("bmac_rint status = 0x%x\n", status); 477#endif 478 479 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 480 continue; 481 count = in16rb(&cmd->d_count); 482 datalen = count - resid - 2; /* 2 == framelen */ 483 if (datalen < sizeof(struct ether_header)) { 484 printf("%s: short packet len = %d\n", 485 ifp->if_xname, datalen); 486 goto next; 487 } 488 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 489 data = (char *)sc->sc_rxbuf + BMAC_BUFLEN * i; 490 491 /* XXX Sometimes bmac reads one extra byte. */ 492 if (datalen == ETHER_MAX_LEN + 1) 493 datalen--; 494 495 /* Trim the CRC. */ 496 datalen -= ETHER_CRC_LEN; 497 498 m = bmac_get(sc, data, datalen); 499 if (m == NULL) { 500 if_statinc(ifp, if_ierrors); 501 goto next; 502 } 503 504 if_percpuq_enqueue(ifp->if_percpuq, m); 505 506next: 507 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 508 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 509 510 cmd->d_status = 0; 511 cmd->d_resid = 0; 512 sc->sc_rxlast = i + 1; 513 } 514 ether_mediachange(ifp); 515 516 dbdma_continue(sc->sc_rxdma); 517 518 return 1; 519} 520 521void 522bmac_reset(struct bmac_softc *sc) 523{ 524 int s; 525 526 s = splnet(); 527 bmac_init(sc); 528 splx(s); 529} 530 531void 532bmac_stop(struct bmac_softc *sc) 533{ 534 struct ifnet *ifp = &sc->sc_if; 535 int s; 536 537 s = splnet(); 538 539 callout_stop(&sc->sc_tick_ch); 540 mii_down(&sc->sc_mii); 541 542 /* Disable TX/RX. */ 543 bmac_reset_bits(sc, TXCFG, TxMACEnable); 544 bmac_reset_bits(sc, RXCFG, RxMACEnable); 545 546 /* Disable all interrupts. */ 547 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 548 549 dbdma_stop(sc->sc_txdma); 550 dbdma_stop(sc->sc_rxdma); 551 552 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 553 ifp->if_timer = 0; 554 555 splx(s); 556} 557 558void 559bmac_start(struct ifnet *ifp) 560{ 561 struct bmac_softc *sc = ifp->if_softc; 562 struct mbuf *m; 563 int tlen; 564 565 if ((ifp->if_flags & IFF_RUNNING) == 0) 566 return; 567 568 while (!sc->sc_txbusy) { 569 IFQ_DEQUEUE(&ifp->if_snd, m); 570 if (m == 0) 571 break; 572 /* 573 * If BPF is listening on this interface, let it see the 574 * packet before we commit it to the wire. 575 */ 576 bpf_mtap(ifp, m, BPF_D_OUT); 577 578 sc->sc_txbusy = true; 579 tlen = bmac_put(sc, sc->sc_txbuf, m); 580 581 /* 5 seconds to watch for failing to transmit */ 582 ifp->if_timer = 5; 583 if_statinc(ifp, if_opackets); /* # of pkts */ 584 585 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 586 } 587} 588 589void 590bmac_transmit_packet(struct bmac_softc *sc, void *buff, int len) 591{ 592 dbdma_command_t *cmd = sc->sc_txcmd; 593 vaddr_t va = (vaddr_t)buff; 594 595#ifdef BMAC_DEBUG 596 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 597 panic("bmac_transmit_packet"); 598#endif 599 600 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 601 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 602 cmd++; 603 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 604 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 605 606 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 607} 608 609int 610bmac_put(struct bmac_softc *sc, void *buff, struct mbuf *m) 611{ 612 struct mbuf *n; 613 int len, tlen = 0; 614 615 for (; m; m = n) { 616 len = m->m_len; 617 if (len == 0) { 618 n = m_free(m); 619 continue; 620 } 621 memcpy(buff, mtod(m, void *), len); 622 buff = (char *)buff + len; 623 tlen += len; 624 n = m_free(m); 625 } 626 if (tlen > PAGE_SIZE) 627 panic("%s: putpacket packet overflow", 628 device_xname(sc->sc_dev)); 629 630 return tlen; 631} 632 633struct mbuf * 634bmac_get(struct bmac_softc *sc, void *pkt, int totlen) 635{ 636 struct mbuf *m; 637 struct mbuf *top, **mp; 638 int len; 639 640 MGETHDR(m, M_DONTWAIT, MT_DATA); 641 if (m == 0) 642 return 0; 643 m_set_rcvif(m, &sc->sc_if); 644 m->m_pkthdr.len = totlen; 645 len = MHLEN; 646 top = 0; 647 mp = ⊤ 648 649 while (totlen > 0) { 650 if (top) { 651 MGET(m, M_DONTWAIT, MT_DATA); 652 if (m == 0) { 653 m_freem(top); 654 return 0; 655 } 656 len = MLEN; 657 } 658 if (totlen >= MINCLSIZE) { 659 MCLGET(m, M_DONTWAIT); 660 if ((m->m_flags & M_EXT) == 0) { 661 m_free(m); 662 m_freem(top); 663 return 0; 664 } 665 len = MCLBYTES; 666 } 667 m->m_len = len = uimin(totlen, len); 668 memcpy(mtod(m, void *), pkt, len); 669 pkt = (char *)pkt + len; 670 totlen -= len; 671 *mp = m; 672 mp = &m->m_next; 673 } 674 675 return top; 676} 677 678void 679bmac_watchdog(struct ifnet *ifp) 680{ 681 struct bmac_softc *sc = ifp->if_softc; 682 683 bmac_reset_bits(sc, RXCFG, RxMACEnable); 684 bmac_reset_bits(sc, TXCFG, TxMACEnable); 685 686 printf("%s: device timeout\n", ifp->if_xname); 687 if_statinc(ifp, if_oerrors); 688 689 bmac_reset(sc); 690} 691 692int 693bmac_ioctl(struct ifnet *ifp, unsigned long cmd, void *data) 694{ 695 struct bmac_softc *sc = ifp->if_softc; 696 struct ifaddr *ifa = (struct ifaddr *)data; 697 int s, error = 0; 698 699 s = splnet(); 700 701 switch (cmd) { 702 703 case SIOCINITIFADDR: 704 ifp->if_flags |= IFF_UP; 705 706 bmac_init(sc); 707 switch (ifa->ifa_addr->sa_family) { 708#ifdef INET 709 case AF_INET: 710 arp_ifinit(ifp, ifa); 711 break; 712#endif 713 default: 714 break; 715 } 716 break; 717 718 case SIOCSIFFLAGS: 719 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 720 break; 721 /* XXX see the comment in ed_ioctl() about code re-use */ 722 if ((ifp->if_flags & IFF_UP) == 0 && 723 (ifp->if_flags & IFF_RUNNING) != 0) { 724 /* 725 * If interface is marked down and it is running, then 726 * stop it. 727 */ 728 bmac_stop(sc); 729 ifp->if_flags &= ~IFF_RUNNING; 730 } else if ((ifp->if_flags & IFF_UP) != 0 && 731 (ifp->if_flags & IFF_RUNNING) == 0) { 732 /* 733 * If interface is marked up and it is stopped, then 734 * start it. 735 */ 736 bmac_init(sc); 737 } else { 738 /* 739 * Reset the interface to pick up changes in any other 740 * flags that affect hardware registers. 741 */ 742 /*bmac_stop(sc);*/ 743 bmac_init(sc); 744 } 745#ifdef BMAC_DEBUG 746 if (ifp->if_flags & IFF_DEBUG) 747 sc->sc_flags |= BMAC_DEBUGFLAG; 748#endif 749 break; 750 751 default: 752 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 753 /* 754 * Multicast list has changed; set the hardware filter 755 * accordingly. 756 */ 757 if (ifp->if_flags & IFF_RUNNING) { 758 bmac_init(sc); 759 bmac_setladrf(sc); 760 } 761 error = 0; 762 } 763 break; 764 } 765 766 splx(s); 767 return error; 768} 769 770/* 771 * Set up the logical address filter. 772 */ 773void 774bmac_setladrf(struct bmac_softc *sc) 775{ 776 struct ethercom *ec = &sc->sc_ethercom; 777 struct ifnet *ifp = &sc->sc_if; 778 struct ether_multi *enm; 779 struct ether_multistep step; 780 uint32_t crc; 781 uint16_t hash[4]; 782 int x; 783 784 /* 785 * Set up multicast address filter by passing all multicast addresses 786 * through a crc generator, and then using the high order 6 bits as an 787 * index into the 64 bit logical address filter. The high order bit 788 * selects the word, while the rest of the bits select the bit within 789 * the word. 790 */ 791 792 if (ifp->if_flags & IFF_PROMISC) { 793 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 794 return; 795 } 796 797 if (ifp->if_flags & IFF_ALLMULTI) { 798 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 799 goto chipit; 800 } 801 802 hash[3] = hash[2] = hash[1] = hash[0] = 0; 803 804 ETHER_LOCK(ec); 805 ETHER_FIRST_MULTI(step, ec, enm); 806 while (enm != NULL) { 807 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 808 /* 809 * We must listen to a range of multicast addresses. 810 * For now, just accept all multicasts, rather than 811 * trying to set only those filter bits needed to match 812 * the range. (At this time, the only use of address 813 * ranges is for IP multicast routing, for which the 814 * range is big enough to require all bits set.) 815 */ 816 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 817 ifp->if_flags |= IFF_ALLMULTI; 818 ETHER_UNLOCK(ec); 819 goto chipit; 820 } 821 822 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 823 824 /* Just want the 6 most significant bits. */ 825 crc >>= 26; 826 827 /* Set the corresponding bit in the filter. */ 828 hash[crc >> 4] |= 1 << (crc & 0xf); 829 830 ETHER_NEXT_MULTI(step, enm); 831 } 832 ETHER_UNLOCK(ec); 833 834 ifp->if_flags &= ~IFF_ALLMULTI; 835 836chipit: 837 bmac_write_reg(sc, HASH0, hash[0]); 838 bmac_write_reg(sc, HASH1, hash[1]); 839 bmac_write_reg(sc, HASH2, hash[2]); 840 bmac_write_reg(sc, HASH3, hash[3]); 841 x = bmac_read_reg(sc, RXCFG); 842 x &= ~RxPromiscEnable; 843 x |= RxHashFilterEnable; 844 bmac_write_reg(sc, RXCFG, x); 845} 846 847int 848bmac_mii_readreg(device_t self, int phy, int reg, uint16_t *val) 849{ 850 return mii_bitbang_readreg(self, &bmac_mbo, phy, reg, val); 851} 852 853int 854bmac_mii_writereg(device_t self, int phy, int reg, uint16_t val) 855{ 856 return mii_bitbang_writereg(self, &bmac_mbo, phy, reg, val); 857} 858 859uint32_t 860bmac_mbo_read(device_t self) 861{ 862 struct bmac_softc *sc = device_private(self); 863 864 return bmac_read_reg(sc, MIFCSR); 865} 866 867void 868bmac_mbo_write(device_t self, uint32_t val) 869{ 870 struct bmac_softc *sc = device_private(self); 871 872 bmac_write_reg(sc, MIFCSR, val); 873} 874 875void 876bmac_mii_statchg(struct ifnet *ifp) 877{ 878 struct bmac_softc *sc = ifp->if_softc; 879 int x; 880 881 /* Update duplex mode in TX configuration */ 882 x = bmac_read_reg(sc, TXCFG); 883 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 884 x |= TxFullDuplex; 885 else 886 x &= ~TxFullDuplex; 887 bmac_write_reg(sc, TXCFG, x); 888 889#ifdef BMAC_DEBUG 890 printf("bmac_mii_statchg 0x%x\n", 891 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 892#endif 893} 894 895void 896bmac_mii_tick(void *v) 897{ 898 struct bmac_softc *sc = v; 899 int s; 900 901 s = splnet(); 902 mii_tick(&sc->sc_mii); 903 splx(s); 904 905 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 906} 907