1/* $NetBSD: cacheops_60.h,v 1.15 2023/12/27 17:35:35 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Leo Weppelman 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <machine/fcode.h> 33 34/* 35 * Invalidate entire TLB. 36 */ 37static __inline void __attribute__((__unused__)) 38TBIA_60(void) 39{ 40 __asm volatile (" .word 0xf518" ); /* pflusha */ 41} 42 43/* 44 * Invalidate any TLB entry for given VA (TB Invalidate Single) 45 */ 46static __inline void __attribute__((__unused__)) 47TBIS_60(vaddr_t va) 48{ 49 register uint8_t *r_va __asm("%a0") = (void *)va; 50 int tmp; 51 52 __asm volatile (" movc %1, %%dfc;" /* select supervisor */ 53 " .word 0xf508;" /* pflush %a0@ */ 54 " moveq %3, %1;" /* select user */ 55 " movc %1, %%dfc;" 56 " .word 0xf508;" /* pflush %a0@ */ 57 " movc %%cacr,%1;" 58 " orl %4,%1;" 59 " movc %1,%%cacr" : "=d" (tmp) : 60 "0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD), 61 "i" (IC60_CABC)); 62} 63 64/* 65 * Invalidate supervisor side of TLB 66 */ 67static __inline void __attribute__((__unused__)) 68TBIAS_60(void) 69{ 70 int tmp; 71 72 /* 73 * Cannot specify supervisor/user on pflusha, so we flush all 74 */ 75 __asm volatile (" .word 0xf518;" 76 " movc %%cacr,%0;" 77 " orl %1,%0;" 78 " movc %0,%%cacr" /* clear all branch cache 79 entries */ 80 : "=d" (tmp) : "i" (IC60_CABC) ); 81} 82 83/* 84 * Invalidate user side of TLB 85 */ 86static __inline void __attribute__((__unused__)) 87TBIAU_60(void) 88{ 89 int tmp; 90 91 /* 92 * Cannot specify supervisor/user on pflusha, so we flush all 93 */ 94 __asm volatile (" .word 0xf518;" 95 " movc %%cacr,%0;" 96 " orl %1,%0;" 97 " movc %0,%%cacr" /* clear all branch cache 98 entries */ 99 : "=d" (tmp) : "i" (IC60_CUBC) ); 100} 101 102/* 103 * Invalidate instruction cache 104 */ 105static __inline void __attribute__((__unused__)) 106ICIA_60(void) 107{ 108 /* inva ic (also clears branch cache) */ 109 __asm volatile (" .word 0xf498;"); 110} 111 112static __inline void __attribute__((__unused__)) 113ICPA_60(void) 114{ 115 /* inva ic (also clears branch cache) */ 116 __asm volatile (" .word 0xf498;"); 117} 118 119/* 120 * Invalidate data cache. 121 */ 122static __inline void __attribute__((__unused__)) 123DCIA_60(void) 124{ 125 __asm volatile (" .word 0xf478;"); /* cpusha dc */ 126} 127 128static __inline void __attribute__((__unused__)) 129DCIS_60(void) 130{ 131 __asm volatile (" .word 0xf478;"); /* cpusha dc */ 132} 133 134static __inline void __attribute__((__unused__)) 135DCIU_60(void) 136{ 137 __asm volatile (" .word 0xf478;"); /* cpusha dc */ 138} 139 140static __inline void __attribute__((__unused__)) 141DCIAS_60(paddr_t pa) 142{ 143 register uint8_t *r_pa __asm("%a0") = (void *)pa; 144 145 __asm volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */ 146} 147 148static __inline void __attribute__((__unused__)) 149PCIA_60(void) 150{ 151 __asm volatile (" .word 0xf478;"); /* cpusha dc */ 152} 153 154#define DCFA_60() DCFA_40() 155#define DCPA_60() DCPA_40() 156#define ICPL_60(pa) ICPL_40(pa) 157#define ICPP_60(pa) ICPP_40(pa) 158#define DCPL_60(pa) DCPL_40(pa) 159#define DCPP_60(pa) DCPP_40(pa) 160#define DCFL_60(pa) DCFL_40(pa) 161#define DCFP_60(pa) DCFP_40(pa) 162