pte.h revision 1.29
1/*	$NetBSD: pte.h,v 1.29 2019/03/07 13:26:24 maxv Exp $	*/
2
3/*
4 * Copyright (c) 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Frank van der Linden for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *      This product includes software developed for the NetBSD Project by
20 *      Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38/*
39 * Copyright (c) 1997 Charles D. Cranor and Washington University.
40 * All rights reserved.
41 *
42 * Redistribution and use in source and binary forms, with or without
43 * modification, are permitted provided that the following conditions
44 * are met:
45 * 1. Redistributions of source code must retain the above copyright
46 *    notice, this list of conditions and the following disclaimer.
47 * 2. Redistributions in binary form must reproduce the above copyright
48 *    notice, this list of conditions and the following disclaimer in the
49 *    documentation and/or other materials provided with the distribution.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 */
62
63#ifndef _I386_PTE_H_
64#define _I386_PTE_H_
65#ifdef _KERNEL_OPT
66#include "opt_xen.h"
67#endif
68
69/*
70 * The PAE extension extends the size of the PTE to 64 bits (52bits physical
71 * address) and is compatible with the amd64 PTE format. The first level
72 * maps 2M, the second 1G, so a third level page table is introduced to
73 * map the 4GB virtual address space. This PD has only 4 entries.
74 * We can't use recursive mapping at level 3 to map the PD pages, as this
75 * would eat one GB of address space. In addition, Xen imposes restrictions
76 * on the entries we put in the L3 page (for example, the page pointed to by
77 * the last slot can't be shared among different L3 pages), which makes
78 * handling this L3 page in the same way we do for L2 on i386 (or L4 on amd64)
79 * difficult. For most things we'll just pretend to have only 2 levels,
80 * with the 2 high bits of the L2 index being in fact the index in the
81 * L3.
82 */
83
84#if !defined(_LOCORE)
85
86/*
87 * here we define the data types for PDEs and PTEs
88 */
89#ifdef PAE
90typedef uint64_t pd_entry_t;		/* PDE */
91typedef uint64_t pt_entry_t;		/* PTE */
92#else
93typedef uint32_t pd_entry_t;		/* PDE */
94typedef uint32_t pt_entry_t;		/* PTE */
95#endif
96
97#endif
98
99/*
100 * now we define various for playing with virtual addresses
101 */
102
103#ifdef PAE
104#define L1_SHIFT	12
105#define L2_SHIFT	21
106#define L3_SHIFT	30
107#define NBPD_L1		(1ULL << L1_SHIFT) /* # bytes mapped by L1 ent (4K) */
108#define NBPD_L2		(1ULL << L2_SHIFT) /* # bytes mapped by L2 ent (2MB) */
109#define NBPD_L3		(1ULL << L3_SHIFT) /* # bytes mapped by L3 ent (1GB) */
110
111#define L3_MASK		0xc0000000
112#define L2_REALMASK	0x3fe00000
113#define L2_MASK		(L2_REALMASK | L3_MASK)
114#define L1_MASK		0x001ff000
115
116#define L3_FRAME	(L3_MASK)
117#define L2_FRAME	(L3_FRAME | L2_MASK)
118#define L1_FRAME	(L2_FRAME|L1_MASK)
119
120#define PG_FRAME	0x000ffffffffff000ULL /* page frame mask */
121#define PG_LGFRAME	0x000fffffffe00000ULL /* large (2MB) page frame mask */
122
123/* macros to get real L2 and L3 index, from our "extended" L2 index */
124#define l2tol3(idx)	((idx) >> (L3_SHIFT - L2_SHIFT))
125#define l2tol2(idx)	((idx) & (L2_REALMASK >>  L2_SHIFT))
126
127#else /* PAE */
128
129#define L1_SHIFT	12
130#define L2_SHIFT	22
131#define NBPD_L1		(1UL << L1_SHIFT) /* # bytes mapped by L1 ent (4K) */
132#define NBPD_L2		(1UL << L2_SHIFT) /* # bytes mapped by L2 ent (4MB) */
133
134#define L2_MASK		0xffc00000
135#define L1_MASK		0x003ff000
136
137#define L2_FRAME	(L2_MASK)
138#define L1_FRAME	(L2_FRAME|L1_MASK)
139
140#define PG_FRAME	0xfffff000	/* page frame mask */
141#define PG_LGFRAME	0xffc00000	/* large (4MB) page frame mask */
142
143#endif /* PAE */
144
145/*
146 * here we define the bits of the PDE/PTE, as described above:
147 *
148 * XXXCDC: need to rename these (PG_u == ugly).
149 */
150#define PG_V		0x00000001	/* valid entry */
151#define PG_RW		0x00000002	/* read-write page */
152#define PG_u		0x00000004	/* user accessible page */
153#define PG_WT		0x00000008	/* write through */
154#define PG_N		0x00000010	/* non-cacheable */
155#define PG_U		0x00000020	/* has been used */
156#define PG_M		0x00000040	/* has been modified */
157#define PG_PAT		0x00000080	/* PAT (on pte) */
158#define PG_PS		0x00000080	/* 4MB page size (2MB for PAE) */
159#define PG_G		0x00000100	/* global, don't TLB flush */
160#define PG_AVAIL1	0x00000200	/* ignored by hardware */
161#define PG_AVAIL2	0x00000400	/* ignored by hardware */
162#define PG_AVAIL3	0x00000800	/* ignored by hardware */
163#define PG_LGPAT	0x00001000	/* PAT on large pages */
164
165/*
166 * various short-hand protection codes
167 */
168#define PG_KW		0x00000002	/* kernel read-write */
169
170#ifdef PAE
171#define PG_NX		0x8000000000000000ULL /* No-execute */
172#else
173#define PG_NX		0		/* dummy */
174#endif
175
176#include <x86/pte.h>
177
178#endif /* _I386_PTE_H_ */
179