plumohci.c revision 1.3
1/* $NetBSD: plumohci.c,v 1.3 2000/06/29 08:17:59 mrg Exp $ */ 2 3/*- 4 * Copyright (c) 2000 UCHIYAMA Yasushi 5 * Copyright (c) 1999 MAEKAWA Masahide <bishop@rr.iij4u.or.jp> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30/* 31 * USB Open Host Controller driver. 32 * 33 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 34 * USB spec: http://www.usb.org/developers/data/usb11.pdf 35 */ 36 37#include <sys/param.h> 38#include <sys/systm.h> 39#include <sys/kernel.h> 40#include <sys/device.h> 41#include <sys/proc.h> 42#include <sys/queue.h> 43 44/* busdma */ 45#include <sys/mbuf.h> 46#include <uvm/uvm_extern.h> 47 48#define _HPCMIPS_BUS_DMA_PRIVATE 49#include <machine/bus.h> 50 51#include <dev/usb/usb.h> 52#include <dev/usb/usbdi.h> 53#include <dev/usb/usbdivar.h> 54#include <dev/usb/usb_mem.h> 55 56#include <dev/usb/ohcireg.h> 57#include <dev/usb/ohcivar.h> 58 59#include <hpcmips/tx/tx39var.h> 60#include <hpcmips/dev/plumvar.h> 61#include <hpcmips/dev/plumicuvar.h> 62#include <hpcmips/dev/plumpowervar.h> 63#include <hpcmips/dev/plumohcireg.h> 64 65int plumohci_match __P((struct device *, struct cfdata *, void *)); 66void plumohci_attach __P((struct device *, struct device *, void *)); 67int plumohci_intr __P((void *)); 68 69void __plumohci_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, 70 bus_addr_t, bus_size_t, int)); 71int __plumohci_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, 72 bus_size_t, bus_dma_segment_t *, int, 73 int *, int)); 74void __plumohci_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, 75 int)); 76int __plumohci_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, 77 int, size_t, caddr_t *, int)); 78void __plumohci_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t)); 79 80struct hpcmips_bus_dma_tag plumohci_bus_dma_tag = { 81 _bus_dmamap_create, 82 _bus_dmamap_destroy, 83 _bus_dmamap_load, 84 _bus_dmamap_load_mbuf, 85 _bus_dmamap_load_uio, 86 _bus_dmamap_load_raw, 87 _bus_dmamap_unload, 88 __plumohci_dmamap_sync, 89 __plumohci_dmamem_alloc, 90 __plumohci_dmamem_free, 91 __plumohci_dmamem_map, 92 __plumohci_dmamem_unmap, 93 _bus_dmamem_mmap, 94 NULL 95}; 96 97struct plumohci_shm { 98 bus_space_handle_t ps_bsh; 99 paddr_t ps_paddr; 100 caddr_t ps_caddr; 101 size_t ps_size; 102 LIST_ENTRY(plumohci_shm) ps_link; 103}; 104 105struct plumohci_softc { 106 struct ohci_softc sc; 107 void *sc_ih; 108 void *sc_wakeih; 109 110 LIST_HEAD(, plumohci_shm) sc_shm_head; 111}; 112 113struct cfattach plumohci_ca = { 114 sizeof(struct plumohci_softc), plumohci_match, plumohci_attach, 115}; 116 117int 118plumohci_match(parent, match, aux) 119 struct device *parent; 120 struct cfdata *match; 121 void *aux; 122{ 123 /* PLUM2 builtin OHCI module */ 124 125 return (1); 126} 127 128void 129plumohci_attach(parent, self, aux) 130 struct device *parent; 131 struct device *self; 132 void *aux; 133{ 134 struct plumohci_softc *sc = (struct plumohci_softc *)self; 135 struct plum_attach_args *pa = aux; 136 usbd_status r; 137 138 sc->sc.iot = pa->pa_iot; 139 sc->sc.sc_bus.dmatag = &plumohci_bus_dma_tag; 140 sc->sc.sc_bus.dmatag->_dmamap_chipset_v = sc; 141 142 /* Map I/O space */ 143 if (bus_space_map(sc->sc.iot, PLUM_OHCI_REGBASE, OHCI_PAGE_SIZE, 144 0, &sc->sc.ioh)) { 145 printf(": cannot map mem space\n"); 146 return; 147 } 148 149 /* power up */ 150 /* 151 * in the case of PLUM2, UHOSTC uses the VRAM as the shared RAM 152 * so establish power/clock of Video contoroller 153 */ 154 plum_power_establish(pa->pa_pc, PLUM_PWR_EXTPW1); 155 plum_power_establish(pa->pa_pc, PLUM_PWR_USB); 156 157 /* Disable interrupts, so we don't can any spurious ones. */ 158 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 159 OHCI_ALL_INTRS); 160 161 /* master enable */ 162 sc->sc_ih = plum_intr_establish(pa->pa_pc, PLUM_INT_USB, IST_EDGE, 163 IPL_USB, ohci_intr, sc); 164#if 0 165 /* 166 * enable the clock restart request interrupt 167 * (for USBSUSPEND state) 168 */ 169 sc->sc_wakeih = plum_intr_establish(pa->pa_pc, PLUM_INT_USBWAKE, 170 IST_EDGE, IPL_USB, 171 plumohci_intr, sc); 172#endif 173 /* 174 * Shared memory list. 175 */ 176 LIST_INIT(&sc->sc_shm_head); 177 178 printf("\n"); 179 180 r = ohci_init(&sc->sc); 181 182 if (r != USBD_NORMAL_COMPLETION) { 183 printf(": init failed, error=%d\n", r); 184 185 plum_intr_disestablish(pa->pa_pc, sc->sc_ih); 186 plum_intr_disestablish(pa->pa_pc, sc->sc_wakeih); 187 188 return; 189 } 190 191 /* Attach usb device. */ 192 sc->sc.sc_child = config_found((void *) sc, &sc->sc.sc_bus, 193 usbctlprint); 194} 195 196int 197plumohci_intr(arg) 198 void *arg; 199{ 200 printf("Plum2 OHCI: wakeup intr\n"); 201 return 0; 202} 203 204/* 205 * Plum2 OHCI specific busdma routines. 206 * Plum2 OHCI shared buffer can't allocate on memory 207 * but V-RAM (busspace). 208 */ 209 210void 211__plumohci_dmamap_sync(t, map, offset, len, ops) 212 bus_dma_tag_t t; 213 bus_dmamap_t map; 214 bus_addr_t offset; 215 bus_size_t len; 216 int ops; 217{ 218 struct plumohci_softc *sc = t->_dmamap_chipset_v; 219 /* 220 * Flush the write buffer allocated on the V-RAM. 221 * Accessing any host controller register flushs write buffer 222 */ 223 224 (void)bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_REVISION); 225} 226 227int 228__plumohci_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, 229 flags) 230 bus_dma_tag_t t; 231 bus_size_t size, alignment, boundary; 232 bus_dma_segment_t *segs; 233 int nsegs; 234 int *rsegs; 235 int flags; 236{ 237 struct plumohci_softc *sc = t->_dmamap_chipset_v; 238 struct plumohci_shm *ps; 239 bus_space_handle_t bsh; 240 paddr_t paddr; 241 caddr_t caddr; 242 int error; 243 244 size = round_page(size); 245 246 /* 247 * Allocate buffer from V-RAM area. 248 */ 249 error = bus_space_alloc(sc->sc.iot, PLUM_OHCI_SHMEMBASE, 250 PLUM_OHCI_SHMEMBASE + PLUM_OHCI_SHMEMSIZE - 1, 251 size, OHCI_PAGE_SIZE, OHCI_PAGE_SIZE, 0, 252 (bus_addr_t*)&caddr, &bsh); 253 if (error) 254 return (1); 255 256 pmap_extract(pmap_kernel(), (vaddr_t)caddr, &paddr); 257 258 ps = malloc(sizeof(struct plumohci_shm), M_DEVBUF, M_NOWAIT); 259 if (ps == 0) 260 return (1); 261 262 ps->ps_bsh = bsh; 263 ps->ps_size = segs[0].ds_len = size; 264 ps->ps_paddr = segs[0].ds_addr = paddr; 265 ps->ps_caddr = caddr; 266 267 LIST_INSERT_HEAD(&sc->sc_shm_head, ps, ps_link); 268 269 *rsegs = 1; 270 271 return (0); 272} 273 274void 275__plumohci_dmamem_free(t, segs, nsegs) 276 bus_dma_tag_t t; 277 bus_dma_segment_t *segs; 278 int nsegs; 279{ 280 struct plumohci_softc *sc = t->_dmamap_chipset_v; 281 struct plumohci_shm *ps; 282 283 for (ps = LIST_FIRST(&sc->sc_shm_head); ps; 284 ps = LIST_NEXT(ps, ps_link)) { 285 286 if (ps->ps_paddr == segs[0].ds_addr) { 287 bus_space_free(sc->sc.iot, ps->ps_bsh, ps->ps_size); 288 LIST_REMOVE(ps, ps_link); 289 free(ps, M_DEVBUF); 290 291 return; 292 } 293 } 294 295 panic("__plumohci_dmamem_free: can't find corresponding handle."); 296 /* NOTREACHED */ 297} 298 299int 300__plumohci_dmamem_map(t, segs, nsegs, size, kvap, flags) 301 bus_dma_tag_t t; 302 bus_dma_segment_t *segs; 303 int nsegs; 304 size_t size; 305 caddr_t *kvap; 306 int flags; 307{ 308 struct plumohci_softc *sc = t->_dmamap_chipset_v; 309 struct plumohci_shm *ps; 310 311 for (ps = LIST_FIRST(&sc->sc_shm_head); ps; 312 ps = LIST_NEXT(ps, ps_link)) { 313 if (ps->ps_paddr == segs[0].ds_addr) { 314 315 *kvap = ps->ps_caddr; 316 317 return (0); 318 } 319 } 320 321 return (1); 322} 323 324void 325__plumohci_dmamem_unmap(t, kva, size) 326 bus_dma_tag_t t; 327 caddr_t kva; 328 size_t size; 329{ 330 /* nothing to do */ 331} 332