1/* $NetBSD: plumohci.c,v 1.18 2021/08/07 16:18:54 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 2000 UCHIYAMA Yasushi 5 * Copyright (c) 1999 MAEKAWA Masahide <bishop@rr.iij4u.or.jp> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30/* 31 * USB Open Host Controller driver. 32 * 33 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 34 * USB spec: http://www.usb.org/developers/data/usb11.pdf 35 */ 36 37#include <sys/cdefs.h> 38__KERNEL_RCSID(0, "$NetBSD: plumohci.c,v 1.18 2021/08/07 16:18:54 thorpej Exp $"); 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/kernel.h> 43#include <sys/device.h> 44#include <sys/proc.h> 45#include <sys/queue.h> 46#include <sys/kmem.h> 47 48/* busdma */ 49#include <sys/mbuf.h> 50#include <uvm/uvm_extern.h> 51 52#include <machine/bus.h> 53#include <machine/bus_dma_hpcmips.h> 54 55#include <dev/usb/usb.h> 56#include <dev/usb/usbdi.h> 57#include <dev/usb/usbdivar.h> 58#include <dev/usb/usb_mem.h> 59 60#include <dev/usb/ohcireg.h> 61#include <dev/usb/ohcivar.h> 62 63#include <hpcmips/tx/tx39var.h> 64#include <hpcmips/dev/plumvar.h> 65#include <hpcmips/dev/plumicuvar.h> 66#include <hpcmips/dev/plumpowervar.h> 67#include <hpcmips/dev/plumohcireg.h> 68 69int plumohci_match(device_t, cfdata_t, void *); 70void plumohci_attach(device_t, device_t, void *); 71int plumohci_intr(void *); 72 73void __plumohci_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, 74 bus_addr_t, bus_size_t, int); 75int __plumohci_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 76 bus_size_t, bus_dma_segment_t *, int, int *, int); 77void __plumohci_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 78int __plumohci_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, 79 int, size_t, void **, int); 80void __plumohci_dmamem_unmap(bus_dma_tag_t, void *, size_t); 81 82struct bus_dma_tag_hpcmips plumohci_bus_dma_tag = { 83 { 84 NULL, 85 { 86 _hpcmips_bd_map_create, 87 _hpcmips_bd_map_destroy, 88 _hpcmips_bd_map_load, 89 _hpcmips_bd_map_load_mbuf, 90 _hpcmips_bd_map_load_uio, 91 _hpcmips_bd_map_load_raw, 92 _hpcmips_bd_map_unload, 93 __plumohci_dmamap_sync, 94 __plumohci_dmamem_alloc, 95 __plumohci_dmamem_free, 96 __plumohci_dmamem_map, 97 __plumohci_dmamem_unmap, 98 _hpcmips_bd_mem_mmap, 99 }, 100 }, 101 NULL, 102}; 103 104struct plumohci_shm { 105 bus_space_handle_t ps_bsh; 106 paddr_t ps_paddr; 107 void * ps_caddr; 108 size_t ps_size; 109 LIST_ENTRY(plumohci_shm) ps_link; 110}; 111 112struct plumohci_softc { 113 struct ohci_softc sc; 114 void *sc_ih; 115 void *sc_wakeih; 116 117 LIST_HEAD(, plumohci_shm) sc_shm_head; 118}; 119 120CFATTACH_DECL_NEW(plumohci, sizeof(struct plumohci_softc), 121 plumohci_match, plumohci_attach, NULL, NULL); 122 123int 124plumohci_match(device_t parent, cfdata_t match, void *aux) 125{ 126 /* PLUM2 builtin OHCI module */ 127 128 return 1; 129} 130 131void 132plumohci_attach(device_t parent, device_t self, void *aux) 133{ 134 struct plumohci_softc *sc = device_private(self); 135 struct plum_attach_args *pa = aux; 136 137 sc->sc.sc_dev = self; 138 sc->sc.sc_bus.ub_hcpriv = sc; 139 140 sc->sc.iot = pa->pa_iot; 141 sc->sc.sc_bus.ub_dmatag = &plumohci_bus_dma_tag.bdt; 142 plumohci_bus_dma_tag._dmamap_chipset_v = sc; 143 144 /* Map I/O space */ 145 if (bus_space_map(sc->sc.iot, PLUM_OHCI_REGBASE, OHCI_PAGE_SIZE, 146 0, &sc->sc.ioh)) { 147 printf(": cannot map mem space\n"); 148 return; 149 } 150 151 /* power up */ 152 /* 153 * in the case of PLUM2, UHOSTC uses the VRAM as the shared RAM 154 * so establish power/clock of Video contoroller 155 */ 156 plum_power_establish(pa->pa_pc, PLUM_PWR_EXTPW1); 157 plum_power_establish(pa->pa_pc, PLUM_PWR_USB); 158 159 /* Disable interrupts, so we don't can any spurious ones. */ 160 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 161 OHCI_ALL_INTRS); 162 163 /* master enable */ 164 sc->sc_ih = plum_intr_establish(pa->pa_pc, PLUM_INT_USB, IST_EDGE, 165 IPL_USB, ohci_intr, sc); 166#if 0 167 /* 168 * enable the clock restart request interrupt 169 * (for USBSUSPEND state) 170 */ 171 sc->sc_wakeih = plum_intr_establish(pa->pa_pc, PLUM_INT_USBWAKE, 172 IST_EDGE, IPL_USB, 173 plumohci_intr, sc); 174#endif 175 /* 176 * Shared memory list. 177 */ 178 LIST_INIT(&sc->sc_shm_head); 179 180 printf("\n"); 181 182 int err = ohci_init(&sc->sc); 183 184 if (err) { 185 printf(": init failed, error=%d\n", err); 186 187 plum_intr_disestablish(pa->pa_pc, sc->sc_ih); 188 plum_intr_disestablish(pa->pa_pc, sc->sc_wakeih); 189 190 return; 191 } 192 193 /* Attach usb device. */ 194 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint, 195 CFARGS_NONE); 196} 197 198int 199plumohci_intr(void *arg) 200{ 201 printf("Plum2 OHCI: wakeup intr\n"); 202 return 0; 203} 204 205/* 206 * Plum2 OHCI specific busdma routines. 207 * Plum2 OHCI shared buffer can't allocate on memory 208 * but V-RAM (busspace). 209 */ 210 211void 212__plumohci_dmamap_sync(bus_dma_tag_t tx, bus_dmamap_t map, bus_addr_t offset, 213 bus_size_t len, int ops) 214{ 215 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 216 struct plumohci_softc *sc = t->_dmamap_chipset_v; 217 218 /* 219 * Flush the write buffer allocated on the V-RAM. 220 * Accessing any host controller register flushs write buffer 221 */ 222 (void)bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_REVISION); 223} 224 225int 226__plumohci_dmamem_alloc(bus_dma_tag_t tx, bus_size_t size, 227 bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs, 228 int nsegs, int *rsegs, int flags) 229{ 230 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 231 struct plumohci_softc *sc = t->_dmamap_chipset_v; 232 struct plumohci_shm *ps; 233 bus_space_handle_t bsh; 234 paddr_t paddr; 235 void *caddr; 236 int error; 237 238 size = round_page(size); 239 240 /* 241 * Allocate buffer from V-RAM area. 242 */ 243 error = bus_space_alloc(sc->sc.iot, PLUM_OHCI_SHMEMBASE, 244 PLUM_OHCI_SHMEMBASE + PLUM_OHCI_SHMEMSIZE - 1, 245 size, OHCI_PAGE_SIZE, 0, 0, 246 (bus_addr_t *)(void *)&caddr, &bsh); 247 if (error) 248 return 1; 249 250 pmap_extract(pmap_kernel(), (vaddr_t)caddr, &paddr); 251 252 ps = kmem_intr_alloc(sizeof(struct plumohci_shm), KM_NOSLEEP); 253 if (ps == 0) 254 return 1; 255 256 ps->ps_bsh = bsh; 257 ps->ps_size = segs[0].ds_len = size; 258 ps->ps_paddr = segs[0].ds_addr = paddr; 259 ps->ps_caddr = caddr; 260 261 LIST_INSERT_HEAD(&sc->sc_shm_head, ps, ps_link); 262 263 *rsegs = 1; 264 265 return 0; 266} 267 268void 269__plumohci_dmamem_free(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs) 270{ 271 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 272 struct plumohci_softc *sc = t->_dmamap_chipset_v; 273 struct plumohci_shm *ps; 274 275 for (ps = LIST_FIRST(&sc->sc_shm_head); ps; 276 ps = LIST_NEXT(ps, ps_link)) { 277 278 if (ps->ps_paddr == segs[0].ds_addr) { 279 bus_space_free(sc->sc.iot, ps->ps_bsh, ps->ps_size); 280 LIST_REMOVE(ps, ps_link); 281 kmem_intr_free(ps, sizeof(*ps)); 282 283 return; 284 } 285 } 286 287 panic("__plumohci_dmamem_free: can't find corresponding handle."); 288 /* NOTREACHED */ 289} 290 291int 292__plumohci_dmamem_map(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs, 293 size_t size, void **kvap, int flags) 294{ 295 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 296 struct plumohci_softc *sc = t->_dmamap_chipset_v; 297 struct plumohci_shm *ps; 298 299 for (ps = LIST_FIRST(&sc->sc_shm_head); ps; 300 ps = LIST_NEXT(ps, ps_link)) { 301 if (ps->ps_paddr == segs[0].ds_addr) { 302 303 *kvap = ps->ps_caddr; 304 305 return 0; 306 } 307 } 308 309 return 1; 310} 311 312void 313__plumohci_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size) 314{ 315 /* nothing to do */ 316} 317