1/* -*-C++-*-	$NetBSD: mips_tx39.cpp,v 1.4 2005/12/11 12:17:28 christos Exp $	*/
2
3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <console.h>
33#include <memory.h>
34#include <mips/mips_tx39.h>
35
36TX39XX::TX39XX(Console *&cons, MemoryManager *&mem, enum ArchitectureOps arch)
37	: MIPSArchitecture(cons, mem)
38{
39	_boot_func = TX39XX::boot_func;
40}
41
42TX39XX::~TX39XX()
43{
44	/* NO-OP */
45}
46
47BOOT_FUNC_(TX39XX)
48
49	BOOL
50TX39XX::init()
51{
52	MIPSArchitecture::init();
53
54	// set D-RAM information
55	_mem->loadBank(0x04000000, // D-RAM bank 0/1
56	    0x04000000);
57
58	return TRUE;
59}
60
61void
62TX39XX::systemInfo()
63{
64	MIPSArchitecture::systemInfo();
65	DPRINTF((TEXT("TX39\n")));
66}
67
68void
69TX39XX::cacheFlush()
70{
71	MIPS_TX39XX_CACHE_FLUSH();
72}
73