1/* $NetBSD: machdep.c,v 1.34 2024/03/05 14:15:30 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2006 Urbana-Champaign Independent Media Center. 5 * Copyright (c) 2006 Garrett D'Amore. 6 * All rights reserved. 7 * 8 * Portions of this code were written by Garrett D'Amore for the 9 * Champaign-Urbana Community Wireless Network Project. 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer in the documentation and/or other materials provided 19 * with the distribution. 20 * 3. All advertising materials mentioning features or use of this 21 * software must display the following acknowledgements: 22 * This product includes software developed by the Urbana-Champaign 23 * Independent Media Center. 24 * This product includes software developed by Garrett D'Amore. 25 * 4. Urbana-Champaign Independent Media Center's name and Garrett 26 * D'Amore's name may not be used to endorse or promote products 27 * derived from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT 30 * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR 31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT 34 * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, 35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 36 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 41 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 */ 43/*- 44 * Copyright (c) 2006 Itronix Inc. 45 * All rights reserved. 46 * 47 * Portions written by Garrett D'Amore for Itronix Inc. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 3. The name of Itronix Inc. may not be used to endorse 58 * or promote products derived from this software without specific 59 * prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 63 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 64 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 65 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 66 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 67 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 68 * ON ANY THEORY OF LIABILITY, WHETHER IN 69 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 70 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 71 * POSSIBILITY OF SUCH DAMAGE. 72 */ 73 74/* 75 * Copyright (c) 1988 University of Utah. 76 * Copyright (c) 1992, 1993 77 * The Regents of the University of California. All rights reserved. 78 * 79 * This code is derived from software contributed to Berkeley by 80 * the Systems Programming Group of the University of Utah Computer 81 * Science Department, The Mach Operating System project at 82 * Carnegie-Mellon University and Ralph Campbell. 83 * 84 * Redistribution and use in source and binary forms, with or without 85 * modification, are permitted provided that the following conditions 86 * are met: 87 * 1. Redistributions of source code must retain the above copyright 88 * notice, this list of conditions and the following disclaimer. 89 * 2. Redistributions in binary form must reproduce the above copyright 90 * notice, this list of conditions and the following disclaimer in the 91 * documentation and/or other materials provided with the distribution. 92 * 3. Neither the name of the University nor the names of its contributors 93 * may be used to endorse or promote products derived from this software 94 * without specific prior written permission. 95 * 96 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 97 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 98 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 99 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 100 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 101 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 102 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 103 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 104 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 105 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 106 * SUCH DAMAGE. 107 * 108 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 109 * from: Utah Hdr: machdep.c 1.63 91/04/24 110 */ 111 112#include <sys/cdefs.h> 113__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.34 2024/03/05 14:15:30 thorpej Exp $"); 114 115#include "opt_ddb.h" 116#include "opt_kgdb.h" 117#include "opt_modular.h" 118 119#include <sys/param.h> 120#include <sys/boot_flag.h> 121#include <sys/device.h> 122#include <sys/kernel.h> 123#include <sys/kcore.h> 124#include <sys/ksyms.h> 125#include <sys/mount.h> 126#include <sys/reboot.h> 127#include <sys/cpu.h> 128 129#include <uvm/uvm_extern.h> 130 131#include <dev/cons.h> 132 133#include "ksyms.h" 134 135#if NKSYMS || defined(DDB) || defined(MODULAR) 136#include <mips/db_machdep.h> 137#include <ddb/db_extern.h> 138#endif 139 140#include <mips/cache.h> 141#include <mips/locore.h> 142#include <mips/cpuregs.h> 143 144#include <mips/atheros/include/platform.h> 145#include <mips/atheros/include/arbusvar.h> 146 147/* Maps for VM objects. */ 148struct vm_map *phys_map = NULL; 149 150int maxmem; /* max memory per process */ 151 152int mem_cluster_cnt; 153phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 154 155void mach_init(void); /* XXX */ 156 157/* Currently the Atheros kernels only support big endian boards */ 158CTASSERT(_BYTE_ORDER == _BIG_ENDIAN); 159 160static void 161cal_timer(void) 162{ 163 uint32_t cntfreq; 164 165 cntfreq = curcpu()->ci_cpu_freq = atheros_get_cpu_freq(); 166 167 /* MIPS 4Kc CP0 counts every other clock */ 168 if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) 169 cntfreq /= 2; 170 171 curcpu()->ci_cctr_freq = cntfreq; 172 curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz; 173 174 /* Compute number of cycles per 1us (1/MHz). 0.5MHz is for roundup. */ 175 curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000); 176} 177 178void 179mach_init(void) 180{ 181 void *kernend; 182 uint32_t memsize; 183 184 extern char edata[], end[]; /* XXX */ 185 186 /* clear the BSS segment */ 187 kernend = (void *)mips_round_page(end); 188 189 memset(edata, 0, (char *)kernend - edata); 190 191 /* setup early console */ 192 atheros_set_platformsw(); 193 194 /* set CPU model info for sysctl_hw */ 195 cpu_setmodel("Atheros %s", atheros_get_cpuname()); 196 197 /* 198 * Set up the exception vectors and CPU-specific function 199 * vectors early on. We need the wbflush() vector set up 200 * before comcnattach() is called (or at least before the 201 * first printf() after that is called). 202 * Sets up mips_cpu_flags that may be queried by other 203 * functions called during startup. 204 * Also clears the I+D caches. 205 */ 206 mips_vector_init(NULL, false); 207 208 /* 209 * Calibrate timers. 210 */ 211 cal_timer(); 212 213 uvm_md_init(); 214 215 /* 216 * Look at arguments passed to us and compute boothowto. 217 */ 218 boothowto = RB_AUTOBOOT; 219#ifdef KADB 220 boothowto |= RB_KDB; 221#endif 222 223 /* 224 * This would be a good place to parse a boot command line, if 225 * we got one from the bootloader. Right now we have no way to 226 * get one from e.g. vxworks. 227 */ 228 229 /* 230 * Determine the memory size. 231 * 232 * Note: Reserve the first page! That's where the trap 233 * vectors are located. 234 */ 235 memsize = atheros_get_memsize(); 236 237 printf("Memory size: 0x%08x\n", memsize); 238 physmem = btoc(memsize); 239 240 mem_clusters[mem_cluster_cnt].start = PAGE_SIZE; 241 mem_clusters[mem_cluster_cnt].size = 242 memsize - mem_clusters[mem_cluster_cnt].start; 243 mem_cluster_cnt++; 244 245 /* 246 * Load the available pages into the VM system. 247 */ 248 mips_page_physload(MIPS_KSEG0_START, (vaddr_t)kernend, 249 mem_clusters, mem_cluster_cnt, NULL, 0); 250 251 /* 252 * Initialize message buffer (at end of core). 253 */ 254 mips_init_msgbuf(); 255 256 /* 257 * Initialize the virtual memory system. 258 */ 259 pmap_bootstrap(); 260 261 /* 262 * Allocate uarea page for lwp0 and set it. 263 */ 264 mips_init_lwp0_uarea(); 265 266 /* 267 * Initialize busses. 268 */ 269 atheros_bus_init(); 270 271 /* 272 * Turn off (ignore) the hardware watchdog. If we got this 273 * far, then we shouldn't need it anymore. 274 */ 275 atheros_wdog_reload(0); 276 277 /* 278 * Turn off watchpoint that may have been enabled by the 279 * PROM. VxWorks bootloader seems to leave one set. 280 */ 281 __asm volatile ( 282 "mtc0 $0, $%0\n\t" 283 "nop\n\t" 284 "nop\n\t" :: "n"(MIPS_COP_0_WATCH_LO)); 285 286 /* 287 * Initialize debuggers, and break into them, if appropriate. 288 */ 289#ifdef DDB 290 if (boothowto & RB_KDB) 291 Debugger(); 292#endif 293} 294 295void 296consinit(void) 297{ 298 299 /* 300 * Everything related to console initialization is done 301 * in mach_init(). 302 */ 303 atheros_consinit(); 304} 305 306void 307cpu_startup(void) 308{ 309 cpu_startup_common(); 310} 311 312void 313cpu_reboot(int howto, char *bootstr) 314{ 315 static int waittime = -1; 316 317 /* Take a snapshot before clobbering any registers. */ 318 savectx(curpcb); 319 320 /* If "always halt" was specified as a boot flag, obey. */ 321 if (boothowto & RB_HALT) 322 howto |= RB_HALT; 323 324 boothowto = howto; 325 326 /* If system is cold, just halt. */ 327 if (cold) { 328 boothowto |= RB_HALT; 329 goto haltsys; 330 } 331 332 if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) { 333 waittime = 0; 334 335 /* 336 * Synchronize the disks.... 337 */ 338 vfs_shutdown(); 339 } 340 341 /* Disable interrupts. */ 342 splhigh(); 343 344 if (boothowto & RB_DUMP) 345 dumpsys(); 346 347 haltsys: 348 /* Run any shutdown hooks. */ 349 doshutdownhooks(); 350 351 pmf_system_shutdown(boothowto); 352 353#if 0 354 if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN) 355 if (board && board->ab_poweroff) 356 board->ab_poweroff(); 357#endif 358 359 /* 360 * Firmware may autoboot (depending on settings), and we cannot pass 361 * flags to it (at least I haven't figured out how to yet), so 362 * we "pseudo-halt" now. 363 */ 364 if (boothowto & RB_HALT) { 365 printf("\n"); 366 printf("The operating system has halted.\n"); 367 printf("Please press any key to reboot.\n\n"); 368 cnpollc(1); /* For proper keyboard command handling */ 369 cngetc(); 370 cnpollc(0); 371 } 372 373 printf("resetting board...\n\n"); 374 mips_icache_sync_all(); 375 mips_dcache_wbinv_all(); 376 atheros_reset(); 377 __asm volatile("jr %0" :: "r"(MIPS_RESET_EXC_VEC)); 378 printf("Oops, back from reset\n\nSpinning..."); 379 for (;;) 380 /* spin forever */ ; /* XXX */ 381 /*NOTREACHED*/ 382} 383