1/*	$NetBSD: netwalker_spi.c,v 1.4 2020/01/15 10:25:47 skrll Exp $	*/
2
3/*-
4 * Copyright (c) 2009  Genetec Corporation.  All rights reserved.
5 * Written by Hashimoto Kenichi for Genetec Corporation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: netwalker_spi.c,v 1.4 2020/01/15 10:25:47 skrll Exp $");
31
32#include "opt_imxspi.h"
33
34#define	_INTR_PRIVATE
35
36#include <sys/param.h>
37#include <sys/bus.h>
38#include <sys/device.h>
39#include <sys/gpio.h>
40
41#include <arm/imx/imx51reg.h>
42#include <arm/imx/imx51var.h>
43#include <arm/imx/imx51_ccmvar.h>
44#include <arm/imx/imx51_ccmreg.h>
45#include <arm/imx/imx51_iomuxreg.h>
46#include <arm/imx/imxgpiovar.h>
47#include <arm/imx/imxspivar.h>
48#include <arm/imx/imxspireg.h>
49
50struct imx51spi_softc {
51	struct imxspi_softc	sc_spi; /* Must be first */
52
53	struct spi_chipset_tag	sc_tag;
54};
55
56CFATTACH_DECL_NEW(spi_netwalker, sizeof(struct imx51spi_softc),
57    imxspi_match, imxspi_attach, NULL, NULL);
58
59static int
60imxspi_cs_enable(void *arg, int slave)
61{
62	switch (slave) {
63	case 0:
64		imxgpio_data_write(GPIO_NO(4, 24), GPIO_PIN_LOW);
65		imxgpio_set_direction(GPIO_NO(4, 24), GPIO_PIN_OUTPUT);
66		break;
67	case 1:
68		imxgpio_data_write(GPIO_NO(4, 25), GPIO_PIN_LOW);
69		imxgpio_set_direction(GPIO_NO(4, 25), GPIO_PIN_OUTPUT);
70		break;
71	case 2:
72		imxgpio_data_write(GPIO_NO(3, 0), GPIO_PIN_LOW);
73		imxgpio_set_direction(GPIO_NO(3, 0), GPIO_PIN_OUTPUT);
74		break;
75	}
76
77	return 0;
78}
79
80static int
81imxspi_cs_disable(void *arg, int slave)
82{
83	switch (slave) {
84	case 0:
85		imxgpio_data_write(GPIO_NO(4, 24), GPIO_PIN_HIGH);
86		imxgpio_set_direction(GPIO_NO(4, 24), GPIO_PIN_INPUT);
87		break;
88	case 1:
89		imxgpio_data_write(GPIO_NO(4, 25), GPIO_PIN_HIGH);
90		imxgpio_set_direction(GPIO_NO(4, 25), GPIO_PIN_INPUT);
91		break;
92	case 2:
93		imxgpio_data_write(GPIO_NO(3, 0), GPIO_PIN_HIGH);
94		imxgpio_set_direction(GPIO_NO(3, 0), GPIO_PIN_INPUT);
95		break;
96	}
97
98	return 0;
99}
100
101int
102imxspi_match(device_t parent, cfdata_t cf, void *aux)
103{
104	if (strcmp(cf->cf_name, "imxspi") == 0)
105		return 1;
106	if (cf->cf_unit != 0)
107		return 1;
108
109	return 0;
110}
111
112void
113imxspi_attach(device_t parent, device_t self, void *aux)
114{
115	struct imx51spi_softc *isc = device_private(self);
116	struct imxspi_softc *sc = &isc->sc_spi;
117	struct axi_attach_args *aa = aux;
118	int cf_flags = device_cfdata(self)->cf_flags;
119	bus_addr_t addr;
120	bus_size_t size;
121
122	addr = aa->aa_addr;
123	size = aa->aa_size;
124	if (size <= 0)
125		size = SPI_SIZE;
126
127	isc->sc_tag.cookie = sc;
128
129	switch (device_unit(self)) {
130	case 0:
131		/* CS 0 GPIO setting */
132		imxgpio_data_write(GPIO_NO(4, 24), GPIO_PIN_HIGH);
133		imxgpio_set_direction(GPIO_NO(4, 24), GPIO_PIN_INPUT);
134
135		/* CS 1 GPIO setting */
136		imxgpio_data_write(GPIO_NO(4, 25), GPIO_PIN_HIGH);
137		imxgpio_set_direction(GPIO_NO(4, 25), GPIO_PIN_INPUT);
138
139		/* CS 2 */
140		/* OJ6SH-T25 Shutdown */
141		imxgpio_data_write(GPIO_NO(3, 14), GPIO_PIN_LOW);
142		imxgpio_set_direction(GPIO_NO(3, 14), GPIO_PIN_OUTPUT);
143
144		/* CS 2 GPIO setting */
145		imxgpio_data_write(GPIO_NO(3, 0), GPIO_PIN_HIGH);
146		imxgpio_set_direction(GPIO_NO(3, 0), GPIO_PIN_INPUT);
147
148		isc->sc_tag.spi_cs_enable = imxspi_cs_enable;
149		isc->sc_tag.spi_cs_disable = imxspi_cs_disable;
150		break;
151	}
152
153	sc->sc_iot = aa->aa_iot;
154	sc->sc_enhanced = cf_flags;
155
156	sc->sc_nslaves = IMXSPINSLAVES;
157	sc->sc_freq = imx51_get_clock(IMX51CLK_CSPI_CLK_ROOT);
158	sc->sc_tag = &isc->sc_tag;
159
160	if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh)) {
161		aprint_error_dev(sc->sc_dev, "couldn't map registers\n");
162		return;
163	}
164
165	/* enable device interrupts */
166	sc->sc_ih = intr_establish(aa->aa_irq, IPL_BIO, IST_LEVEL,
167	    imxspi_intr, sc);
168
169	imxspi_attach_common(self);
170}
171