1/* $NetBSD: lubbock_reg.h,v 1.1.2.3 2005/04/01 14:27:09 skrll Exp $ */ 2 3/* 4 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Genetec Corporation may not be used to endorse or 16 * promote products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 33#ifndef _EVBARM_LUBBOCK_REG_H 34#define _EVBARM_LUBBOCK_REG_H 35 36#include <arm/xscale/pxa2x0reg.h> 37 38/* lubbock on-board IOs */ 39#define LUBBOCK_OBIO_PBASE PXA2X0_CS2_START /* Physical address */ 40#define LUBBOCK_OBIO_SIZE 0x00000100 41 42#define LUBBOCK_SRAM_PBASE (PXA2X0_CS2_START+0x02000000) 43#define LUBBOCK_SRAM_SIZE 0x00100000 44 45#define LUBBOCK_91C96_PBASE PXA2X0_CS3_START 46#define LUBBOCK_91C96_IO LUBBOCK_91C96_PBASE 47#define LUBBOCK_91C96_ATTRMEM (LUBBOCK_91C96_PBASE+0x02000000) 48 49 50/* SA-1111 companion chip registers */ 51#define LUBBOCK_SACC_PBASE PXA2X0_CS4_START 52 53/* 54 * Logical mapping for onboard/integrated peripherals 55 */ 56#define LUBBOCK_IO_AREA_VBASE 0xfd000000 57#define LUBBOCK_OBIO_VBASE 0xfd000000 58#define LUBBOCK_GPIO_VBASE 0xfd100000 59#define LUBBOCK_CLKMAN_VBASE 0xfd200000 60#define LUBBOCK_INTCTL_VBASE 0xfd300000 61#define LUBBOCK_FFUART_VBASE 0xfd400000 62#define LUBBOCK_BTUART_VBASE 0xfd500000 63/* FFUART and/or BTUART are mapped to this area when 64 used for console or kgdb port */ 65 66/* 67 * Onboard register address 68 * (offset from LUBBOCK_OBIO_PBASE) 69 */ 70#define LUBBOCK_SYSTEMID 0x0000 71#define LUBBOCK_HEXLED 0x0010 72#define LUBBOCK_LEDCTL 0x0040 73#define LUBBOCK_CONFIGSW 0x0050 74#define LUBBOCK_USERSW 0x0060 75#define LUBBOCK_MISCWR 0x0080 76#define MISCWR_S1PWR (3U<<14) 77#define MISCWR_LCDDISP (1U<<8) 78#define MISCWR_IRDAMODE (1U<<4) /* 1=FIR, 0=SIR */ 79#define MISCWR_GREENLED (1U<<3) 80#define MISCWR_ENETEN16 (1U<<2) 81#define MISCWR_PCRESET (1U<<1) /* Processor card reset */ 82#define MSICWR_SYSRESET (1U<<0) 83#define LUBBOCK_MISCRD 0x0090 84#define LUBBOCK_INTRMASK 0x00c0 85#define LUBBOCK_INTRCTL 0x00d0 86 87#define ioreg_read(a) (*(volatile unsigned *)(a)) 88#define ioreg_write(a,v) (*(volatile unsigned *)(a)=(v)) 89 90#define ioreg16_read(a) (*(volatile uint16_t *)(a)) 91#define ioreg16_write(a,v) (*(volatile uint16_t *)(a)=(v)) 92 93#define ioreg8_read(a) (*(volatile uint8_t *)(a)) 94#define ioreg8_write(a,v) (*(volatile uint8_t *)(a)=(v)) 95 96#endif /* _EVBARM_LUBBOCK_REG_H */ 97