1/* $NetBSD$ */ 2 3/* 4 * Copyright (c) 2012 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 30#ifndef _EVBARM_KOBO_REG_H 31#define _EVBARM_KOBO_REG_H 32 33#include "opt_imx.h" 34 35#include <arm/imx/imx51reg.h> 36 37#define DDRSDRAM_BASE CSD0DDR_BASE 38 39/* map UART2 and IOMUXC for bootstrap */ 40#define KOBO_PRIVATE_VBASE 0xf0000000 41#define KOBO_IO_VBASE0 0xfd000000 42#define KOBO_IO_PBASE0 0x53f00000 /* GPIO, IOMUXC, UART */ 43 44#define KOBO_UART2_VBASE \ 45 (IMX51_UART2_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0) 46#define KOBO_IOMUXC_VBASE \ 47 (IOMUXC_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0) 48 49/* GPIO[1..4] */ 50#define KOBO_GPIO1_VBASE \ 51 (GPIO1_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0) 52#define KOBO_GPIO_VBASE(n) \ 53 (KOBO_GPIO1_VBASE+((n)-1)*0x4000) 54#define KOBO_WDOG_VBASE \ 55 (WDOG1_BASE-KOBO_IO_PBASE0+KOBO_IO_VBASE0) 56 57#define ioreg_read(a) (*(volatile uint32_t *)(a)) 58#define ioreg_write(a,v) (*(volatile uint32_t *)(a)=(v)) 59 60#define ioreg32_read ioreg_read 61#define ioreg32_write ioreg_write 62 63#define ioreg16_read(a) (*(volatile uint16_t *)(a)) 64#define ioreg16_write(a,v) (*(volatile uint16_t *)(a) = (v)) 65 66#define ioreg8_read(a) (*(volatile uint8_t *)(a)) 67#define ioreg8_write(a,v) (*(volatile uint8_t *)(a) = (v)) 68 69#endif /* _EVBARM_KOBO_REG_H */ 70