1/* $NetBSD: kobo_machdep.c,v 1.9 2023/04/20 08:28:05 skrll Exp $ */ 2 3/* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for RAKUTEN Kobo. 30 * Based on iq80310_machhdep.c 31 */ 32/* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67/* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104#include <sys/cdefs.h> 105__KERNEL_RCSID(0, "$NetBSD: kobo_machdep.c,v 1.9 2023/04/20 08:28:05 skrll Exp $"); 106 107#include "opt_evbarm_boardtype.h" 108#include "opt_arm_debug.h" 109#include "opt_console.h" 110#include "opt_cputypes.h" 111#include "opt_ddb.h" 112#include "opt_kgdb.h" 113#include "opt_md.h" 114#include "opt_com.h" 115#include "imxuart.h" 116#include "opt_imxuart.h" 117#include "opt_imx.h" 118#include "opt_machdep.h" 119 120#include <sys/param.h> 121#include <sys/device.h> 122#include <sys/reboot.h> 123#include <sys/termios.h> 124#include <sys/bus.h> 125 126#include <machine/db_machdep.h> 127#ifdef KGDB 128#include <sys/kgdb.h> 129#endif 130 131#include <machine/bootconfig.h> 132 133#include <arm/arm32/machdep.h> 134 135#include <arm/imx/imx51reg.h> 136#include <arm/imx/imx51var.h> 137#include <arm/imx/imxuartreg.h> 138#include <arm/imx/imxuartvar.h> 139#include <arm/imx/imx50_iomuxreg.h> 140 141#include <evbarm/kobo/kobo.h> 142#include <evbarm/kobo/kobo_reg.h> 143 144/* Kernel text starts 1MB in from the bottom of the kernel address space. */ 145#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 146 147BootConfig bootconfig; /* Boot config storage */ 148static char bootargs[MAX_BOOT_STRING]; 149char *boot_args = NULL; 150 151extern char KERNEL_BASE_phys[]; 152 153/* filled in before cleaning bss. keep in .data */ 154u_int uboot_args[4] __attribute__((__section__(".data"))); 155 156/* 157 * Macros to translate between physical and virtual for a subset of the 158 * kernel address space. *Not* for general use. 159 */ 160#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 161 162void consinit(void); 163 164#ifdef KGDB 165void kgdb_port_init(void); 166#endif 167 168static void init_clocks(void); 169static void setup_ioports(void); 170 171#ifndef CONSPEED 172#define CONSPEED B115200 /* What RedBoot uses */ 173#endif 174#ifndef CONMODE 175#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 176#endif 177 178int comcnspeed = CONSPEED; 179int comcnmode = CONMODE; 180 181/* 182 * Static device mappings. These peripheral registers are mapped at 183 * fixed virtual addresses very early in initarm() so that we can use 184 * them while booting the kernel, and stay at the same address 185 * throughout whole kernel's life time. 186 * 187 * We use this table twice; once with bootstrap page table, and once 188 * with kernel's page table which we build up in initarm(). 189 * 190 * Since we map these registers into the bootstrap page table using 191 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 192 * registers segment-aligned and segment-rounded in order to avoid 193 * using the 2nd page tables. 194 */ 195 196const struct pmap_devmap kobo_devmap[] = { 197 DEVMAP_ENTRY( 198 /* for UART2, IOMUXC */ 199 KOBO_IO_VBASE0, 200 KOBO_IO_PBASE0, 201 L1_S_SIZE * 4 202 ), 203 DEVMAP_ENTRY_END 204}; 205 206#ifndef MEMSTART 207#define MEMSTART 0x70000000 208#endif 209#ifndef MEMSIZE 210#define MEMSIZE 256 211#endif 212 213static void 214init_clocks(void) 215{ 216 cortex_pmc_ccnt_init(); 217} 218 219struct iomux_setup { 220 /* iomux registers are 32-bit wide, but upper 16 bits are not 221 * used. */ 222 uint16_t reg; 223 uint16_t val; 224}; 225 226#define IOMUX_M(padname, mux) \ 227 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 228 229#define IOMUX_P(padname, pad) \ 230 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 231 232#define IOMUX_MP(padname, mux, pad) \ 233 IOMUX_M(padname, mux), \ 234 IOMUX_P(padname, pad) 235 236#define IOMUX_DATA(offset, value) \ 237 { \ 238 .reg = (offset), \ 239 .val = (value), \ 240 } 241 242const struct iomux_setup iomux_setup_data[] = { 243#define HYS PAD_CTL_HYS 244#define ODE PAD_CTL_ODE 245#define DSEHIGH PAD_CTL_DSE_HIGH 246#define DSEMID PAD_CTL_DSE_MID 247#define DSELOW PAD_CTL_DSE_LOW 248#define DSEMAX PAD_CTL_DSE_MAX 249#define SRE PAD_CTL_SRE 250#define KEEPER PAD_CTL_KEEPER 251#define PULL PAD_CTL_PULL 252#define PU_22K PAD_CTL_PUS_22K_PU 253#define PU_47K PAD_CTL_PUS_47K_PU 254#define PU_100K PAD_CTL_PUS_100K_PU 255#define PD_100K PAD_CTL_PUS_100K_PD 256#define HVE PAD_CTL_HVE /* Low output voltage */ 257 258#define ALT0 IOMUX_CONFIG_ALT0 259#define ALT1 IOMUX_CONFIG_ALT1 260#define ALT2 IOMUX_CONFIG_ALT2 261#define ALT3 IOMUX_CONFIG_ALT3 262#define ALT4 IOMUX_CONFIG_ALT4 263#define ALT5 IOMUX_CONFIG_ALT5 264#define ALT6 IOMUX_CONFIG_ALT6 265#define ALT7 IOMUX_CONFIG_ALT7 266#define SION IOMUX_CONFIG_SION 267 268 /* I2C1 */ 269 IOMUX_MP(I2C1_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 270 IOMUX_MP(I2C1_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 271 272 /* I2C2 */ 273 IOMUX_MP(I2C2_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 274 IOMUX_MP(I2C2_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 275 276 /* I2C3 */ 277 IOMUX_MP(I2C3_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 278 IOMUX_MP(I2C3_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 279 280 /* UART2 */ 281 IOMUX_MP(UART2_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 282 IOMUX_MP(UART2_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 283 284 /* SD1 */ 285 IOMUX_MP(SD1_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE), 286 IOMUX_MP(SD1_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE), 287 IOMUX_MP(SD1_D0, ALT0, HVE | PU_22K | DSEMAX | SRE), 288 IOMUX_MP(SD1_D1, ALT0, HVE | PU_22K | DSEMAX | SRE), 289 IOMUX_MP(SD1_D2, ALT0, HVE | PU_22K | DSEMAX | SRE), 290 IOMUX_MP(SD1_D3, ALT0, HVE | PU_22K | DSEMAX | SRE), 291// IOMUX_MP(SD1_CD, ALT0, HVE | PU_22K | DSEMAX | SRE), 292 293 /* SD2 */ 294 IOMUX_MP(SD2_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE), 295 IOMUX_MP(SD2_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE), 296 IOMUX_MP(SD2_D0, ALT0, HVE | PU_22K | DSEMAX | SRE), 297 IOMUX_MP(SD2_D1, ALT0, HVE | PU_22K | DSEMAX | SRE), 298 IOMUX_MP(SD2_D2, ALT0, HVE | PU_22K | DSEMAX | SRE), 299 IOMUX_MP(SD2_D3, ALT0, HVE | PU_22K | DSEMAX | SRE), 300 IOMUX_MP(SD2_CD, ALT0, HVE | PU_22K | DSEMAX | SRE), 301 302 IOMUX_DATA(IOMUXC_ESDHC2_IPP_CARD_DET_SELECT_INPUT, INPUT_DAISY_1), 303 304 /* SD3 */ 305 IOMUX_MP(SD3_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE), 306 IOMUX_MP(SD3_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE), 307 IOMUX_MP(SD3_D0, ALT0, HVE | PU_22K | DSEMAX | SRE), 308 IOMUX_MP(SD3_D1, ALT0, HVE | PU_22K | DSEMAX | SRE), 309 IOMUX_MP(SD3_D2, ALT0, HVE | PU_22K | DSEMAX | SRE), 310 IOMUX_MP(SD3_D3, ALT0, HVE | PU_22K | DSEMAX | SRE), 311// IOMUX_MP(SD3_CD, ALT0, HVE | PU_22K | DSEMAX | SRE), 312 313 /* OTG */ 314 IOMUX_M(PWM2, ALT2), 315// IOMUX_MP(PWM1, ALT2, HYS | KEEPER | DSEHIGH), 316 317 /* EPDC */ 318 IOMUX_M(EPDC_D0, ALT0), 319 IOMUX_M(EPDC_D1, ALT0), 320 IOMUX_M(EPDC_D2, ALT0), 321 IOMUX_M(EPDC_D3, ALT0), 322 IOMUX_M(EPDC_D4, ALT0), 323 IOMUX_M(EPDC_D5, ALT0), 324 IOMUX_M(EPDC_D6, ALT0), 325 IOMUX_M(EPDC_D7, ALT0), 326 IOMUX_M(EPDC_GDCLK, ALT0), 327 IOMUX_M(EPDC_GDSP, ALT0), 328 IOMUX_M(EPDC_GDOE, ALT0), 329 IOMUX_M(EPDC_GDRL, ALT0), 330 IOMUX_M(EPDC_SDCLK, ALT0), 331 IOMUX_M(EPDC_SDOE, ALT0), 332 IOMUX_M(EPDC_SDLE, ALT0), 333 IOMUX_M(EPDC_BDR0, ALT0), 334 IOMUX_M(EPDC_BDR1, ALT0), 335 IOMUX_M(EPDC_SDCE0, ALT0), 336 337 IOMUX_M(EPDC_PWRSTAT, ALT1), /* GPIO3[28] */ 338 IOMUX_M(EPDC_PWRCTRL0, ALT1), /* GPIO3[29] */ 339 IOMUX_M(EPDC_VCOM0, ALT1), /* GPIO4[21] */ 340 IOMUX_M(UART4_TXD, ALT1), /* GPIO6[16] */ 341 IOMUX_M(UART4_RXD, ALT1), /* GPIO6[17] */ 342 343// IOMUX_M(PWM2, ALT1), /* GPIO6[25] */ 344 345#undef ODE 346#undef HYS 347#undef SRE 348#undef PULL 349#undef KEEPER 350#undef PU_22K 351#undef PU_47K 352#undef PU_100K 353#undef PD_100K 354#undef HVE 355#undef DSEMAX 356#undef DSEHIGH 357#undef DSEMID 358#undef DSELOW 359 360#undef ALT0 361#undef ALT1 362#undef ALT2 363#undef ALT3 364#undef ALT4 365#undef ALT5 366#undef ALT6 367#undef ALT7 368#undef SION 369}; 370 371static void 372setup_ioports(void) 373{ 374 int i; 375 const struct iomux_setup *p; 376 377 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 378 p = iomux_setup_data + i; 379 380 ioreg_write(KOBO_IOMUXC_VBASE + p->reg, 381 p->val); 382 } 383} 384 385#ifdef CONSDEVNAME 386const char consdevname[] = CONSDEVNAME; 387 388#ifndef CONMODE 389#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 390#endif 391#ifndef CONSPEED 392#define CONSPEED 115200 393#endif 394 395int consmode = CONMODE; 396int consrate = CONSPEED; 397 398#endif /* CONSDEVNAME */ 399 400#ifndef IMXUART_FREQ 401#define IMXUART_FREQ 24000000 402#endif 403 404/* 405 * vaddr_t initarm(...) 406 * 407 * Initial entry point on startup. This gets called before main() is 408 * entered. 409 * It should be responsible for setting up everything that must be 410 * in place when main is called. 411 * This includes 412 * Taking a copy of the boot configuration structure. 413 * Initialising the physical console so characters can be printed. 414 * Setting up page tables for the kernel 415 */ 416vaddr_t 417initarm(void *arg) 418{ 419 /* 420 * Heads up ... Setup the CPU / MMU / TLB functions 421 */ 422 if (set_cpufuncs()) // starts PMC counter 423 panic("cpu not recognized!"); 424 425 extern char ARM_BOOTSTRAP_LxPT[]; 426 pmap_devmap_bootstrap((vaddr_t)ARM_BOOTSTRAP_LxPT, kobo_devmap); 427 428 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 429 430 setup_ioports(); 431 432 consinit(); 433 434 init_clocks(); 435 436#ifdef KGDB 437 kgdb_port_init(); 438#endif 439 440 /* Talk to the user */ 441 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 442 443#ifdef BOOT_ARGS 444 char mi_bootargs[] = BOOT_ARGS; 445 parse_mi_bootargs(mi_bootargs); 446#endif 447 bootargs[0] = '\0'; 448 449#ifdef VERBOSE_INIT_ARM 450 printf("initarm: Configuring system"); 451 printf(", CLIDR=%010o CTR=%#x", 452 armreg_clidr_read(), armreg_ctr_read()); 453 printf("\n"); 454#endif 455 456#ifdef VERBOSE_INIT_ARM 457 printf("initarm: Configuring system ...\n"); 458#endif 459 /* 460 * Set up the variables that define the availability of physical 461 * memory. 462 */ 463 464 /* Fake bootconfig structure for the benefit of pmap.c. */ 465 bootconfig.dramblocks = 1; 466 bootconfig.dram[0].address = MEMSTART; 467 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 468 469 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE; 470 471#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 472 const bool mapallmem_p = true; 473 if (ram_size > (KERNEL_VM_BASE - KERNEL_BASE)) { 474 printf("%s: dropping RAM size from %luMB to %uMB\n", 475 __func__, (unsigned long) (ram_size >> 20), 476 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 477 ram_size = KERNEL_VM_BASE - KERNEL_BASE; 478 } 479 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 480#else 481 const bool mapallmem_p = false; 482#endif 483 484 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 485 KERNEL_BASE_PHYS); 486 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 487 kobo_devmap, mapallmem_p); 488 489#ifdef BOOTHOWTO 490 boothowto |= BOOTHOWTO; 491#endif 492 493 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 494} 495 496void 497consinit(void) 498{ 499 static int consinit_called = 0; 500 501 if (consinit_called) 502 return; 503 504 consinit_called = 1; 505 506#ifdef CONSDEVNAME 507 508#if NIMXUART > 0 509 imxuart_set_frequency(IMXUART_FREQ, 2); 510#endif 511 512#if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 513 if (strcmp(consdevname, "imxuart") == 0) { 514 paddr_t consaddr; 515#ifdef CONADDR 516 consaddr = CONADDR; 517#else 518 consaddr = IMX51_UART2_BASE; 519#endif 520 imxuart_cnattach(&armv7_generic_bs_tag, consaddr, consrate, consmode); 521 return; 522 } 523#endif 524 525#endif 526 527#if (NWSDISPLAY > 0) && defined(IMXEPDCCONSOLE) 528#if NUKBD > 0 529 ukbd_cnattach(); 530#endif 531 { 532 extern void kobo_cnattach(void); 533 kobo_cnattach(); 534 } 535#endif 536} 537 538#ifdef KGDB 539#ifndef KGDB_DEVNAME 540#define KGDB_DEVNAME "imxuart" 541#endif 542#ifndef KGDB_DEVMODE 543#define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 544#endif 545 546const char kgdb_devname[20] = KGDB_DEVNAME; 547int kgdb_mode = KGDB_DEVMODE; 548int kgdb_addr = KGDB_DEVADDR; 549extern int kgdb_rate; /* defined in kgdb_stub.c */ 550 551void 552kgdb_port_init(void) 553{ 554#if (NIMXUART > 0) 555 if (strcmp(kgdb_devname, "imxuart") == 0) { 556 imxuart_kgdb_attach(&armv7_generic_bs_tag, kgdb_addr, 557 kgdb_rate, kgdb_mode); 558 return; 559 } 560 561#endif 562} 563#endif 564