gt.c revision 1.13 
1/*	$NetBSD: gt.c,v 1.13 2005/03/25 15:01:57 tsutsui Exp $	*/
2
3/*
4 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions, and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.13 2005/03/25 15:01:57 tsutsui Exp $");
30
31#include "opt_pci.h"
32#include "pci.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/ioctl.h>
37#include <sys/select.h>
38#include <sys/tty.h>
39#include <sys/proc.h>
40#include <sys/user.h>
41#include <sys/conf.h>
42#include <sys/file.h>
43#include <sys/uio.h>
44#include <sys/kernel.h>
45#include <sys/syslog.h>
46#include <sys/types.h>
47#include <sys/device.h>
48#include <sys/malloc.h>
49#include <sys/extent.h>
50
51#include <machine/autoconf.h>
52#include <machine/bus.h>
53#include <machine/intr.h>
54
55#include <dev/pci/pcivar.h>
56#ifdef PCI_NETBSD_CONFIGURE
57#include <dev/pci/pciconf.h>
58#endif
59
60#include <cobalt/cobalt/clockvar.h>
61#include <cobalt/dev/gtreg.h>
62
63struct gt_softc {
64	struct device	sc_dev;
65
66	bus_space_tag_t sc_bst;
67	bus_space_handle_t sc_bsh;
68	struct cobalt_pci_chipset sc_pc;
69};
70
71static int	gt_match(struct device *, struct cfdata *, void *);
72static void	gt_attach(struct device *, struct device *, void *);
73static int	gt_print(void *aux, const char *pnp);
74
75static void	gt_timer_init(struct gt_softc *sc);
76static void	gt_timer0_init(void *);
77static long	gt_timer0_read(void *);
78
79CFATTACH_DECL(gt, sizeof(struct gt_softc),
80    gt_match, gt_attach, NULL, NULL);
81
82static int
83gt_match(parent, match, aux)
84	struct device *parent;
85	struct cfdata *match;
86	void *aux;
87{
88	return 1;
89}
90
91#define GT_REG_REGION	0x1000
92
93static void
94gt_attach(parent, self, aux)
95	struct device *parent;
96	struct device *self;
97	void *aux;
98{
99	struct mainbus_attach_args *ma = aux;
100	struct gt_softc *sc = (void *)self;
101#if NPCI > 0
102	pci_chipset_tag_t pc;
103	struct pcibus_attach_args pba;
104#endif
105
106	sc->sc_bst = ma->ma_iot;
107	if (bus_space_map(sc->sc_bst, ma->ma_addr, GT_REG_REGION,
108	    0, &sc->sc_bsh)) {
109		printf(": unable to map GT64111 registers\n");
110		return;
111	}
112
113	printf("\n");
114
115	gt_timer_init(sc);
116
117	bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_PCI_COMMAND,
118	    (bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_PCI_COMMAND) &
119	    ~PCI_SYNCMODE) | PCI_PCLK_HIGH);
120
121#if NPCI > 0
122	pc = &sc->sc_pc;
123	pc->pc_bst = sc->sc_bst;
124	pc->pc_bsh = sc->sc_bsh;
125
126#ifdef PCI_NETBSD_CONFIGURE
127	pc->pc_ioext = extent_create("pciio", 0x10100000, 0x11ffffff,
128	    M_DEVBUF, NULL, 0, EX_NOWAIT);
129	pc->pc_memext = extent_create("pcimem", 0x12000000, 0x13ffffff,
130	    M_DEVBUF, NULL, 0, EX_NOWAIT);
131	pci_configure_bus(pc, pc->pc_ioext, pc->pc_memext, NULL, 0, 0);
132#endif
133	pba.pba_dmat = &pci_bus_dma_tag;
134	pba.pba_dmat64 = NULL;
135	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
136	pba.pba_bus = 0;
137	pba.pba_bridgetag = NULL;
138	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
139		PCI_FLAGS_MRL_OKAY | /*PCI_FLAGS_MRM_OKAY|*/ PCI_FLAGS_MWI_OKAY;
140	pba.pba_pc = pc;
141	config_found_ia(self, "pcibus", &pba, gt_print);
142#endif
143}
144
145static int
146gt_print(aux, pnp)
147	void *aux;
148	const char *pnp;
149{
150	/* XXX */
151	return 0;
152}
153
154static void
155gt_timer_init(struct gt_softc *sc)
156{
157
158	/* stop timer0 */
159	bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL,
160	    bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL) & ~ENTC0);
161
162	timer_start = gt_timer0_init;
163	timer_read  = gt_timer0_read;
164	timer_cookie = sc;
165}
166
167#define TIMER0_INIT_VALUE 500000
168
169static void
170gt_timer0_init(void *cookie)
171{
172	struct gt_softc *sc = cookie;
173
174	bus_space_write_4(sc->sc_bst, sc->sc_bsh,
175	    GT_TIMER_COUNTER0, TIMER0_INIT_VALUE);
176	/* start timer0 */
177	bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL,
178	    bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL) | ENTC0);
179}
180
181static long
182gt_timer0_read(void *cookie)
183{
184	struct gt_softc *sc = cookie;
185	uint32_t counter0;
186
187	counter0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_COUNTER0);
188	counter0 = TIMER0_INIT_VALUE - counter0;
189#if 0
190	counter /= 50;
191#else
192	/*
193	 * From pmax/pmax/dec_3min.c:
194	 * 1/64 + 1/256 + 1/2048 = 41/2048 = 1/49.9512...
195	 */
196	counter0 = (counter0 >> 6) + (counter0 >> 8) + (counter0 >> 11);
197#endif
198	return counter0;
199}
200