1/* $NetBSD: zs_pcc.c,v 1.8 2007/12/03 15:33:26 ad Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29#include <sys/cdefs.h> 30__KERNEL_RCSID(0, "$NetBSD: zs_pcc.c,v 1.8 2007/12/03 15:33:26 ad Exp $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/proc.h> 35#include <sys/device.h> 36#include <sys/conf.h> 37#include <sys/file.h> 38#include <sys/ioctl.h> 39#include <sys/tty.h> 40#include <sys/time.h> 41#include <sys/kernel.h> 42#include <sys/syslog.h> 43 44#include <dev/cons.h> 45#include <dev/ic/z8530reg.h> 46#include <machine/z8530var.h> 47 48#include <machine/cpu.h> 49#include <machine/autoconf.h> 50 51#include <cesfic/cesfic/isr.h> 52 53#include <cesfic/dev/zsvar.h> 54 55extern void sic_enable_int(int, int, int, int, int); 56 57static int zsc_pcc_match(device_t, cfdata_t, void *); 58static void zsc_pcc_attach(device_t, device_t, void *); 59 60static char *zsbase; 61 62CFATTACH_DECL_NEW(zsc_pcc, sizeof(struct zsc_softc), 63 zsc_pcc_match, zsc_pcc_attach, NULL, NULL); 64 65static int 66zsc_pcc_match(device_t parent, cfdata_t cf, void *aux) 67{ 68 69 return (1); 70} 71 72static void 73zsc_pcc_attach(device_t parent, device_t self, void *aux) 74{ 75 struct zsc_softc *zsc = device_private(self); 76 static int didintr; 77 78 zsc->zsc_dev = self; 79 80 if (!zsbase) 81 mainbus_map(0x58000000, 0x10000, 0, (void *)&zsbase); 82 83 /* Do common parts of SCC configuration. */ 84 zs_config(zsc, zsbase); 85 86 /* 87 * Now safe to install interrupt handlers. Note the arguments 88 * to the interrupt handlers aren't used. Note, we only do this 89 * once since both SCCs interrupt at the same level and vector. 90 */ 91 if (didintr == 0) { 92 didintr = 1; 93 (void) isrlink(zshard, zsc, 4, ISRPRI_TTY); 94 sic_enable_int(19, 0, 4, 4, 0); 95 } 96 zsc->zsc_softintr_cookie = softint_establish(SOFTINT_SERIAL, 97 (void (*)(void *))zsc_intr_soft, zsc); 98 99 zs_write_reg(zsc->zsc_cs[0], 2, 0x18 + ZSHARD_PRI); 100 zs_write_reg(zsc->zsc_cs[0], 9, ZSWR9_MASTER_IE); 101} 102 103void 104zs_cnattach(void *base) 105{ 106 107 zsbase = base; 108 109 zs_cninit(zsbase); 110} 111