1/* $NetBSD: ti_edma.h,v 1.1 2019/10/27 12:14:51 jmcneill Exp $ */ 2 3/*- 4 * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#ifndef _TI_EDMA_H 29#define _TI_EDMA_H 30 31#define EDMA_PID_REG 0x0000 32#define EDMA_CCCFG_REG 0x0004 33#define EDMA_CCCFG_MP_EXIST __BIT(25) 34#define EDMA_CCCFG_CHMAP_EXIST __BIT(24) 35#define EDMA_CCCFG_NUM_REGN __BITS(21,20) 36#define EDMA_CCCFG_NUM_EVQUEUE __BITS(18,16) 37#define EDMA_CCCFG_NUM_PAENTRY __BITS(14,12) 38#define EDMA_CCCFG_NUM_INTCH __BITS(10,8) 39#define EDMA_CCCFG_NUM_QDMACH __BITS(6,4) 40#define EDMA_CCCFG_NUM_DMACH __BITS(2,0) 41#define EDMA_SYSCONFIG_REG 0x0010 42#define EDMA_DCHMAP_REG(n) (0x0100 + 4 * (n)) 43#define EDMA_DCHMAP_PAENTRY __BITS(13,5) 44#define EDMA_QCHMAP_REG(n) (0x0200 + 4 * (n)) 45#define EDMA_DMAQNUM_REG(n) (0x0240 + 4 * (n)) 46#define EDMA_QDMAQNUM_REG 0x0260 47#define EDMA_QUEPRI_REG 0x0284 48#define EDMA_EMR_REG 0x0300 49#define EDMA_EMRH_REG 0x0304 50#define EDMA_EMCR_REG 0x0308 51#define EDMA_EMCRH_REG 0x030c 52#define EDMA_QEMR_REG 0x0310 53#define EDMA_QEMRC_REG 0x0314 54#define EDMA_CCERR_REG 0x0318 55#define EDMA_CCERRCLR_REG 0x031c 56#define EDMA_EEVAL_REG 0x0320 57#define EDMA_DRAE_REG(n) (0x0340 + 8 * (n)) 58#define EDMA_DRAEH_REG(n) (0x0340 + 8 * (n) + 4) 59#define EDMA_QRAE_REG(n) (0x0380 + 4 * (n)) 60#define EDMA_QE_REG(q, e) (0x0400 + 0x40 * (q) + 4 * (e)) 61#define EDMA_QSTAT_REG(n) (0x0600 + 4 * (n)) 62#define EDMA_QWMTHRA_REG 0x0620 63#define EDMA_CCSTAT_REG 0x0640 64#define EDMA_MPFAR_REG 0x0800 65#define EDMA_MPFSR_REG 0x0804 66#define EDMA_MPFCR_REG 0x0808 67#define EDMA_MPPAG_REG 0x080c 68#define EDMA_MPPA_REG(n) (0x0810 + 4 * (n)) 69#define EDMA_ER_REG 0x1000 70#define EDMA_ERH_REG 0x1004 71#define EDMA_ECR_REG 0x1008 72#define EDMA_ECRH_REG 0x100c 73#define EDMA_ESR_REG 0x1010 74#define EDMA_ESRH_REG 0x1014 75#define EDMA_CER_REG 0x1018 76#define EDMA_CERH_REG 0x101c 77#define EDMA_EER_REG 0x1020 78#define EDMA_EERH_REG 0x1024 79#define EDMA_EECR_REG 0x1028 80#define EDMA_EECRH_REG 0x102c 81#define EDMA_EESR_REG 0x1030 82#define EDMA_EESRH_REG 0x1034 83#define EDMA_SER_REG 0x1038 84#define EDMA_SERH_REG 0x103c 85#define EDMA_SECR_REG 0x1040 86#define EDMA_SECRH_REG 0x1044 87#define EDMA_IER_REG 0x1050 88#define EDMA_IERH_REG 0x1054 89#define EDMA_IECR_REG 0x1058 90#define EDMA_IECRH_REG 0x105c 91#define EDMA_IESR_REG 0x1060 92#define EDMA_IESRH_REG 0x1064 93#define EDMA_IPR_REG 0x1068 94#define EDMA_IPRH_REG 0x106c 95#define EDMA_ICR_REG 0x1070 96#define EDMA_ICRH_REG 0x1074 97#define EDMA_IEVAL_REG 0x1078 98#define EDMA_IEVAL_EVAL __BIT(0) 99#define EDMA_QER_REG 0x1080 100#define EDMA_QEER_REG 0x1084 101#define EDMA_QEECR_REG 0x1088 102#define EDMA_QEESR_REG 0x108c 103#define EDMA_QSER_REG 0x1090 104#define EDMA_QSECR_REG 0x1094 105 106#define EDMA_PARAM_BASE(n) (0x4000 + 0x20 * (n)) 107#define EDMA_PARAM_OPT_REG(n) (EDMA_PARAM_BASE(n) + 0x00) 108#define EDMA_PARAM_OPT_PRIV __BIT(31) 109#define EDMA_PARAM_OPT_PRIVID __BITS(27,24) 110#define EDMA_PARAM_OPT_ITCCHEN __BIT(23) 111#define EDMA_PARAM_OPT_TCCHEN __BIT(22) 112#define EDMA_PARAM_OPT_ITCINTEN __BIT(21) 113#define EDMA_PARAM_OPT_TCINTEN __BIT(20) 114#define EDMA_PARAM_OPT_TCC __BITS(17,12) 115#define EDMA_PARAM_OPT_TCCMODE __BIT(11) 116#define EDMA_PARAM_OPT_FWID __BITS(10,8) 117#define EDMA_PARAM_OPT_STATIC __BIT(3) 118#define EDMA_PARAM_OPT_SYNCDIM __BIT(2) 119#define EDMA_PARAM_OPT_DAM __BIT(1) 120#define EDMA_PARAM_OPT_SAM __BIT(0) 121#define EDMA_PARAM_SRC_REG(n) (EDMA_PARAM_BASE(n) + 0x04) 122#define EDMA_PARAM_CNT_REG(n) (EDMA_PARAM_BASE(n) + 0x08) 123#define EDMA_PARAM_CNT_BCNT __BITS(31,16) 124#define EDMA_PARAM_CNT_ACNT __BITS(15,0) 125#define EDMA_PARAM_DST_REG(n) (EDMA_PARAM_BASE(n) + 0x0c) 126#define EDMA_PARAM_BIDX_REG(n) (EDMA_PARAM_BASE(n) + 0x10) 127#define EDMA_PARAM_BIDX_DSTBIDX __BITS(31,16) 128#define EDMA_PARAM_BIDX_SRCBIDX __BITS(15,0) 129#define EDMA_PARAM_LNK_REG(n) (EDMA_PARAM_BASE(n) + 0x14) 130#define EDMA_PARAM_LNK_BCNTRLD __BITS(31,16) 131#define EDMA_PARAM_LNK_LINK __BITS(15,0) 132#define EDMA_PARAM_CIDX_REG(n) (EDMA_PARAM_BASE(n) + 0x18) 133#define EDMA_PARAM_CIDX_DSTCIDX __BITS(31,16) 134#define EDMA_PARAM_CIDX_SRCCIDX __BITS(15,0) 135#define EDMA_PARAM_CCNT_REG(n) (EDMA_PARAM_BASE(n) + 0x1c) 136#define EDMA_PARAM_CCNT_CCNT __BITS(15,0) 137 138enum edma_type { 139 EDMA_TYPE_DMA, 140 EDMA_TYPE_QDMA 141}; 142 143struct edma_param { 144 uint32_t ep_opt; 145 uint32_t ep_src; 146 uint32_t ep_dst; 147 uint16_t ep_bcnt; 148 uint16_t ep_acnt; 149 uint16_t ep_dstbidx; 150 uint16_t ep_srcbidx; 151 uint16_t ep_bcntrld; 152 uint16_t ep_link; 153 uint16_t ep_dstcidx; 154 uint16_t ep_srccidx; 155 uint16_t ep_ccnt; 156}; 157 158struct edma_channel; 159 160struct edma_channel *edma_channel_alloc(enum edma_type, unsigned int, 161 void (*)(void *), void *); 162void edma_channel_free(struct edma_channel *); 163uint16_t edma_param_alloc(struct edma_channel *); 164void edma_param_free(struct edma_channel *, uint16_t); 165void edma_set_param(struct edma_channel *, uint16_t, struct edma_param *); 166int edma_transfer_enable(struct edma_channel *, uint16_t); 167int edma_transfer_start(struct edma_channel *); 168void edma_halt(struct edma_channel *); 169uint8_t edma_channel_index(struct edma_channel *); 170void edma_dump(struct edma_channel *); 171void edma_dump_param(struct edma_channel *, uint16_t); 172 173#endif /* !_TI_EDMA_H */ 174