sa1111.c revision 1.9 
1/*      $NetBSD: sa1111.c,v 1.9 2002/10/02 05:02:31 thorpej Exp $	*/
2
3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by IWAMOTO Toshihiro.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *        This product includes software developed by the NetBSD
21 *        Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 *    contributors may be used to endorse or promote products derived
24 *    from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39/*
40 * TODO:
41 *   - separate machine specific attach code
42 *   - introduce bus abstraction to support SA1101
43 */
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/types.h>
48#include <sys/conf.h>
49#include <sys/device.h>
50#include <sys/kernel.h>
51#include <sys/malloc.h>
52#include <sys/uio.h>
53
54#include <machine/bus.h>
55#ifdef hpcarm
56#include <machine/platid.h>
57#include <machine/platid_mask.h>
58#endif
59
60#include <arm/sa11x0/sa11x0_reg.h>
61#include <arm/sa11x0/sa11x0_var.h>
62#include <arm/sa11x0/sa11x0_gpioreg.h>
63#include <arm/sa11x0/sa1111_reg.h>
64#include <arm/sa11x0/sa1111_var.h>
65
66static	int	sacc_probe(struct device *, struct cfdata *, void *);
67static	void	sacc_attach(struct device *, struct device *, void *);
68static	int	sa1111_search(struct device *, struct cfdata *, void *);
69static	int	sa1111_print(void *, const char *);
70
71static void	sacc_intr_calculatemasks(struct sacc_softc *);
72static void	sacc_intr_setpolarity(sacc_chipset_tag_t *, int , int);
73int		sacc_intr(void *);
74
75#ifndef hpcarm
76void *softintr_establish(int, int (*)(void *), void *);
77void softintr_schedule(void *);
78#endif
79
80#ifdef hpcarm
81struct platid_data sacc_platid_table[] = {
82	{ &platid_mask_MACH_HP_JORNADA_720, (void *)1 },
83	{ &platid_mask_MACH_HP_JORNADA_720JP, (void *)1 },
84	{ NULL, NULL }
85};
86#endif
87
88CFATTACH_DECL(sacc, sizeof(struct sacc_softc),
89    sacc_probe, sacc_attach, NULL, NULL);
90
91#ifdef INTR_DEBUG
92#define DPRINTF(arg)	printf arg
93#else
94#define DPRINTF(arg)
95#endif
96
97static int
98sacc_probe(parent, match, aux)
99	struct device *parent;
100	struct cfdata *match;
101	void *aux;
102{
103	struct sa11x0_attach_args *sa = aux;
104	bus_space_handle_t ioh;
105	u_int32_t skid;
106
107	if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &ioh))
108		return (0);
109
110	skid = bus_space_read_4(sa->sa_iot, ioh, SACCSBI_SKID);
111	bus_space_unmap(sa->sa_iot, ioh, sa->sa_size);
112
113	if ((skid & 0xffffff00) != 0x690cc200)
114		return (0);
115
116	return (1);
117}
118
119static void
120sacc_attach(parent, self, aux)
121	struct device *parent;
122	struct device *self;
123	void *aux;
124{
125	int i, gpiopin;
126	u_int32_t skid;
127	struct sacc_softc *sc = (struct sacc_softc *)self;
128	struct sa11x0_softc *psc = (struct sa11x0_softc *)parent;
129	struct sa11x0_attach_args *sa = aux;
130#ifdef hpcarm
131	struct platid_data *p;
132#endif
133
134	printf("\n");
135
136	sc->sc_iot = sa->sa_iot;
137	sc->sc_piot = psc->sc_iot;
138	sc->sc_gpioh = psc->sc_gpioh;
139#ifdef hpcarm
140	if ((p = platid_search_data(&platid, sacc_platid_table)) == NULL)
141		return;
142
143	gpiopin = (int) p->data;
144#else
145	gpiopin = sa->sa_gpio;
146#endif
147	sc->sc_gpiomask = 1 << gpiopin;
148
149	if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0,
150			  &sc->sc_ioh)) {
151		printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
152		return;
153	}
154
155	skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
156
157	printf("%s: SA1111 rev %d.%d\n", sc->sc_dev.dv_xname,
158	       (skid & 0xf0) >> 3, skid & 0xf);
159
160	for(i = 0; i < SACCIC_LEN; i++)
161		sc->sc_intrhand[i] = NULL;
162
163	/* initialize SA1111 interrupt controller */
164	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
165	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
166	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
167	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
168			  SACCIC_INTSTATCLR0, 0xffffffff);
169	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
170			  SACCIC_INTSTATCLR1, 0xffffffff);
171
172	/* connect to SA1110's GPIO intr */
173	sa11x0_intr_establish(0, gpiopin, 1, IPL_SERIAL, sacc_intr, sc);
174
175	/*
176	 *  Attach each devices
177	 */
178	config_search(sa1111_search, self, NULL);
179}
180
181static int
182sa1111_search(parent, cf, aux)
183	struct device *parent;
184	struct cfdata *cf;
185	void *aux;
186{
187        if (config_match(parent, cf, NULL) > 0)
188                config_attach(parent, cf, NULL, sa1111_print);
189
190        return 0;
191}
192
193static int
194sa1111_print(aux, name)
195	void *aux;
196	const char *name;
197{
198	return (UNCONF);
199}
200
201int
202sacc_intr(arg)
203	void *arg;
204{
205	int i;
206	u_int32_t mask;
207	struct sacc_intrvec intstat;
208	struct sacc_softc *sc = arg;
209#ifdef hpcarm
210	struct sacc_intrhand *ih;
211#endif
212
213	intstat.lo =
214	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
215	intstat.hi =
216	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
217	DPRINTF(("sacc_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
218
219	/* clear SA1110's GPIO intr status */
220	bus_space_write_4(sc->sc_piot, sc->sc_gpioh,
221			  SAGPIO_EDR, sc->sc_gpiomask);
222
223	for(i = 0, mask = 1; i < 32; i++, mask <<= 1)
224		if (intstat.lo & mask) {
225			/*
226			 * Clear intr status before calling intr handlers.
227			 * This cause stray interrupts, but clearing
228			 * after calling intr handlers cause intr lossage.
229			 */
230			bus_space_write_4(sc->sc_iot, sc->sc_ioh,
231					  SACCIC_INTSTATCLR0, 1 << i);
232
233#ifdef hpcarm
234			for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
235				softintr_schedule(ih->ih_soft);
236#endif
237		}
238	for(i = 0, mask = 1; i < SACCIC_LEN - 32; i++, mask <<= 1)
239		if (intstat.hi & mask) {
240			bus_space_write_4(sc->sc_iot, sc->sc_ioh,
241					  SACCIC_INTSTATCLR1, 1 << i);
242#ifdef hpcarm
243			for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
244				softintr_schedule(ih->ih_soft);
245#endif
246		}
247	return 1;
248}
249
250void *
251sacc_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
252	sacc_chipset_tag_t *ic;
253	int irq, type, level;
254	int (*ih_fun)(void *);
255	void *ih_arg;
256{
257	int s;
258	struct sacc_softc *sc = (struct sacc_softc *)ic;
259	struct sacc_intrhand **p, *ih;
260
261	/* no point in sleeping unless someone can free memory. */
262	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
263	if (ih == NULL)
264		panic("sacc_intr_establish: can't malloc handler info");
265
266	if (irq < 0 || irq > SACCIC_LEN ||
267	    ! (type == IST_EDGE_RAISE || type == IST_EDGE_FALL))
268		panic("sacc_intr_establish: bogus irq or type");
269
270	if (sc->sc_intrhand[irq] == NULL) {
271		sacc_intr_setpolarity(ic, irq, type);
272		sc->sc_intrtype[irq] = type;
273	} else if (sc->sc_intrtype[irq] != type)
274		/* XXX we should be able to share raising and
275		 * falling edge intrs */
276		panic("sacc_intr_establish: type must be unique");
277
278	/* install intr handler */
279#ifdef hpcarm
280	ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun,
281					 ih_arg);
282#endif
283	ih->ih_irq = irq;
284	ih->ih_next = NULL;
285
286	s = splhigh();
287	for(p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next)
288		;
289
290	*p = ih;
291
292	sacc_intr_calculatemasks(sc);
293	splx(s);
294
295	return(ih);
296}
297
298void
299sacc_intr_disestablish(ic, arg)
300	sacc_chipset_tag_t *ic;
301	void *arg;
302{
303	int irq, s;
304	struct sacc_softc *sc = (struct sacc_softc *)ic;
305	struct sacc_intrhand *ih, **p;
306
307	ih = (struct sacc_intrhand *)arg;
308	irq = ih->ih_irq;
309
310#ifdef DIAGNOSTIC
311	if (irq < 0 || irq > SACCIC_LEN)
312		panic("sacc_intr_disestablish: bogus irq");
313#endif
314
315	s = splhigh();
316
317	for(p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) {
318		if (*p == NULL)
319			panic("sacc_intr_disestablish: handler not registered");
320		if (*p == ih)
321			break;
322	}
323	*p = (*p)->ih_next;
324
325	sacc_intr_calculatemasks(sc);
326	splx(s);
327
328	free(ih, M_DEVBUF);
329}
330
331void
332sacc_intr_setpolarity(ic, irq, type)
333	sacc_chipset_tag_t *ic;
334	int irq;
335	int type;
336{
337	struct sacc_softc *sc = (struct sacc_softc *)ic;
338	int s;
339	u_int32_t pol, mask;
340	int addr;
341
342	if (irq >= 32) {
343		addr = SACCIC_INTPOL1;
344		irq -= 32;
345	} else
346		addr = SACCIC_INTPOL0;
347
348	mask = (1 << irq);
349
350	s = splhigh();
351	pol = bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr);
352	if (type == IST_EDGE_RAISE)
353		pol &= ~mask;
354	else
355		pol |= mask;
356	bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, pol);
357	splx(s);
358}
359
360void
361sacc_intr_calculatemasks(sc)
362	struct sacc_softc *sc;
363{
364	int irq;
365
366	sc->sc_imask.lo = 0;
367	sc->sc_imask.hi = 0;
368	for(irq = 0; irq < 32; irq++)
369		if (sc->sc_intrhand[irq])
370			sc->sc_imask.lo |= (1 << irq);
371	for(irq = 0; irq < SACCIC_LEN - 32; irq++)
372		if (sc->sc_intrhand[irq + 32])
373			sc->sc_imask.hi |= (1 << irq);
374
375
376	/* XXX this should not be done here */
377	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0,
378			  sc->sc_imask.lo);
379	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1,
380			  sc->sc_imask.hi);
381	DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask.lo,
382	    sc->sc_imask.hi));
383}
384