1/*      $NetBSD: sa1111.c,v 1.28 2021/08/07 16:18:45 thorpej Exp $	*/
2
3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by IWAMOTO Toshihiro.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * TODO:
34 *   - introduce bus abstraction to support SA-1101
35 */
36
37#include <sys/cdefs.h>
38__KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.28 2021/08/07 16:18:45 thorpej Exp $");
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/types.h>
43#include <sys/conf.h>
44#include <sys/device.h>
45#include <sys/kernel.h>
46#include <sys/kmem.h>
47#include <sys/uio.h>
48
49#include <sys/bus.h>
50#include <machine/intr.h>
51
52#include <arm/sa11x0/sa11x0_reg.h>
53#include <arm/sa11x0/sa11x0_var.h>
54#include <arm/sa11x0/sa11x0_gpioreg.h>
55#include <arm/sa11x0/sa1111_reg.h>
56#include <arm/sa11x0/sa1111_var.h>
57
58#include "locators.h"
59
60static int	sa1111_print(void *, const char *);
61
62static void	sacc_intr_calculatemasks(struct sacc_softc *);
63static void	sacc_intr_setpolarity(sacc_chipset_tag_t *, int , int);
64
65#ifdef INTR_DEBUG
66#define DPRINTF(arg)	printf arg
67#else
68#define DPRINTF(arg)
69#endif
70
71int
72sacc_probe(device_t parent, cfdata_t match, void *aux)
73{
74	struct sa11x0_attach_args *sa = aux;
75	bus_space_handle_t ioh;
76	uint32_t skid;
77
78	if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &ioh))
79		return 0;
80
81	skid = bus_space_read_4(sa->sa_iot, ioh, SACCSBI_SKID);
82	bus_space_unmap(sa->sa_iot, ioh, sa->sa_size);
83
84	if ((skid & 0xffffff00) != 0x690cc200)
85		return 0;
86
87	return 1;
88}
89
90
91int
92sa1111_search(device_t parent, cfdata_t cf, const int *ldesc,
93    void *aux)
94{
95	struct sa1111_attach_args aa;
96
97	aa.sa_addr = cf->cf_loc[SACCCF_ADDR];
98	aa.sa_size = cf->cf_loc[SACCCF_SIZE];
99	aa.sa_intr = cf->cf_loc[SACCCF_INTR];
100#if 0
101	aa.sa_membase = cf->cf_loc[SACCCF_MEMBASE];
102	aa.sa_memsize = cf->cf_loc[SACCCF_MEMSIZE];
103#endif
104
105        if (config_probe(parent, cf, &aa))
106                config_attach(parent, cf, &aa, sa1111_print, CFARGS_NONE);
107
108        return 0;
109}
110
111static int
112sa1111_print(void *aux, const char *name)
113{
114
115	return UNCONF;
116}
117
118
119void *
120sacc_intr_establish(sacc_chipset_tag_t *ic, int irq, int type, int level,
121    int (*ih_fun)(void *), void *ih_arg)
122{
123	int s;
124	struct sacc_softc *sc = (struct sacc_softc *)ic;
125	struct sacc_intrhand **p, *ih;
126
127	ih = kmem_alloc(sizeof *ih, KM_SLEEP);
128
129	if (irq < 0 || irq > SACCIC_LEN ||
130	    !(type == IST_EDGE_RAISE || type == IST_EDGE_FALL))
131		panic("sacc_intr_establish: bogus irq or type");
132
133	if (sc->sc_intrhand[irq] == NULL) {
134		sacc_intr_setpolarity(ic, irq, type);
135		sc->sc_intrtype[irq] = type;
136	} else if (sc->sc_intrtype[irq] != type)
137		/* XXX we should be able to share raising and
138		 * falling edge intrs */
139		panic("sacc_intr_establish: type must be unique");
140
141	/* install intr handler */
142	/* map interrupt level to appropriate softinterrupt level */
143	level = SOFTINT_SERIAL;
144	ih->ih_soft = softint_establish(level, (void (*)(void *)) ih_fun,
145					 ih_arg);
146	ih->ih_irq = irq;
147	ih->ih_next = NULL;
148
149	s = splhigh();
150	for (p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next)
151		continue;
152
153	*p = ih;
154
155	sacc_intr_calculatemasks(sc);
156	splx(s);
157
158	return ih;
159}
160
161void
162sacc_intr_disestablish(sacc_chipset_tag_t *ic, void *arg)
163{
164	int irq, s;
165	struct sacc_softc *sc = (struct sacc_softc *)ic;
166	struct sacc_intrhand *ih, **p;
167
168	ih = (struct sacc_intrhand *)arg;
169	irq = ih->ih_irq;
170
171#ifdef DIAGNOSTIC
172	if (irq < 0 || irq > SACCIC_LEN)
173		panic("sacc_intr_disestablish: bogus irq");
174#endif
175
176	s = splhigh();
177
178	for (p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) {
179		if (*p == NULL)
180			panic("sacc_intr_disestablish: handler not registered");
181		if (*p == ih)
182			break;
183	}
184	*p = (*p)->ih_next;
185
186	sacc_intr_calculatemasks(sc);
187	splx(s);
188
189	kmem_free(ih, sizeof(*ih));
190}
191
192static void
193sacc_intr_setpolarity(sacc_chipset_tag_t *ic, int irq, int type)
194{
195	struct sacc_softc *sc = (struct sacc_softc *)ic;
196	int s;
197	uint32_t pol, mask;
198	int addr;
199
200	if (irq >= 32) {
201		addr = SACCIC_INTPOL1;
202		irq -= 32;
203	} else
204		addr = SACCIC_INTPOL0;
205
206	mask = (1 << irq);
207
208	s = splhigh();
209	pol = bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr);
210	if (type == IST_EDGE_RAISE)
211		pol &= ~mask;
212	else
213		pol |= mask;
214	bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, pol);
215	splx(s);
216}
217
218static void
219sacc_intr_calculatemasks(struct sacc_softc *sc)
220{
221	int irq;
222
223	sc->sc_imask.lo = 0;
224	sc->sc_imask.hi = 0;
225	for (irq = 0; irq < 32; irq++)
226		if (sc->sc_intrhand[irq])
227			sc->sc_imask.lo |= (1 << irq);
228	for (irq = 0; irq < SACCIC_LEN - 32; irq++)
229		if (sc->sc_intrhand[irq + 32])
230			sc->sc_imask.hi |= (1 << irq);
231
232
233	/* XXX this should not be done here */
234	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0,
235			  sc->sc_imask.lo);
236	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1,
237			  sc->sc_imask.hi);
238	DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask.lo,
239	    sc->sc_imask.hi));
240}
241