sa1111.c revision 1.13
1/* $NetBSD: sa1111.c,v 1.13 2005/08/26 13:19:35 drochner Exp $ */ 2 3/*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by IWAMOTO Toshihiro. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * TODO: 41 * - introduce bus abstraction to support SA1101 42 */ 43 44#include <sys/cdefs.h> 45__KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.13 2005/08/26 13:19:35 drochner Exp $"); 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/types.h> 50#include <sys/conf.h> 51#include <sys/device.h> 52#include <sys/kernel.h> 53#include <sys/malloc.h> 54#include <sys/uio.h> 55 56#include <machine/bus.h> 57#ifdef hpcarm 58#include <machine/platid.h> 59#include <machine/platid_mask.h> 60#endif 61 62#include <arm/sa11x0/sa11x0_reg.h> 63#include <arm/sa11x0/sa11x0_var.h> 64#include <arm/sa11x0/sa11x0_gpioreg.h> 65#include <arm/sa11x0/sa1111_reg.h> 66#include <arm/sa11x0/sa1111_var.h> 67 68#include "locators.h" 69 70static int sa1111_print(void *, const char *); 71 72static void sacc_intr_calculatemasks(struct sacc_softc *); 73static void sacc_intr_setpolarity(sacc_chipset_tag_t *, int , int); 74int sacc_intr(void *); 75 76#if !defined(__HAVE_GENERIC_SOFT_INTERRUPTS) 77void *softintr_establish(int, int (*)(void *), void *); 78void softintr_schedule(void *); 79#endif 80 81#ifdef INTR_DEBUG 82#define DPRINTF(arg) printf arg 83#else 84#define DPRINTF(arg) 85#endif 86 87int 88sacc_probe(parent, match, aux) 89 struct device *parent; 90 struct cfdata *match; 91 void *aux; 92{ 93 struct sa11x0_attach_args *sa = aux; 94 bus_space_handle_t ioh; 95 u_int32_t skid; 96 97 if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &ioh)) 98 return (0); 99 100 skid = bus_space_read_4(sa->sa_iot, ioh, SACCSBI_SKID); 101 bus_space_unmap(sa->sa_iot, ioh, sa->sa_size); 102 103 if ((skid & 0xffffff00) != 0x690cc200) 104 return (0); 105 106 return (1); 107} 108 109 110int 111sa1111_search(parent, cf, ldesc, aux) 112 struct device *parent; 113 struct cfdata *cf; 114 const int *ldesc; 115 void *aux; 116{ 117 struct sa1111_attach_args aa; 118 119 aa.sa_addr = cf->cf_loc[SACCCF_ADDR]; 120 aa.sa_size = cf->cf_loc[SACCCF_SIZE]; 121 aa.sa_intr = cf->cf_loc[SACCCF_INTR]; 122#if 0 123 aa.sa_membase = cf->cf_loc[SACCCF_MEMBASE]; 124 aa.sa_memsize = cf->cf_loc[SACCCF_MEMSIZE]; 125#endif 126 127 if (config_match(parent, cf, &aa) > 0) 128 config_attach(parent, cf, &aa, sa1111_print); 129 130 return 0; 131} 132 133static int 134sa1111_print(aux, name) 135 void *aux; 136 const char *name; 137{ 138 return (UNCONF); 139} 140 141 142void * 143sacc_intr_establish(ic, irq, type, level, ih_fun, ih_arg) 144 sacc_chipset_tag_t *ic; 145 int irq, type, level; 146 int (*ih_fun)(void *); 147 void *ih_arg; 148{ 149 int s; 150 struct sacc_softc *sc = (struct sacc_softc *)ic; 151 struct sacc_intrhand **p, *ih; 152 153 /* no point in sleeping unless someone can free memory. */ 154 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 155 if (ih == NULL) 156 panic("sacc_intr_establish: can't malloc handler info"); 157 158 if (irq < 0 || irq > SACCIC_LEN || 159 ! (type == IST_EDGE_RAISE || type == IST_EDGE_FALL)) 160 panic("sacc_intr_establish: bogus irq or type"); 161 162 if (sc->sc_intrhand[irq] == NULL) { 163 sacc_intr_setpolarity(ic, irq, type); 164 sc->sc_intrtype[irq] = type; 165 } else if (sc->sc_intrtype[irq] != type) 166 /* XXX we should be able to share raising and 167 * falling edge intrs */ 168 panic("sacc_intr_establish: type must be unique"); 169 170 /* install intr handler */ 171#if defined(__GENERIC_SOFT_INTERRUPTS_ALL_LEVELS) || \ 172 !defined(__HAVE_GENERIC_SOFT_INTERRUPTS) 173 174 ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun, 175 ih_arg); 176#else 177 /* map interrupt level to appropriate softinterrupt level */ 178 if (level >= IPL_SOFTSERIAL) 179 level = IPL_SOFTSERIAL; 180 else if(level >= IPL_SOFTNET) 181 level = IPL_SOFTNET; 182 ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun, 183 ih_arg); 184#endif 185 ih->ih_irq = irq; 186 ih->ih_next = NULL; 187 188 s = splhigh(); 189 for(p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next) 190 ; 191 192 *p = ih; 193 194 sacc_intr_calculatemasks(sc); 195 splx(s); 196 197 return(ih); 198} 199 200void 201sacc_intr_disestablish(ic, arg) 202 sacc_chipset_tag_t *ic; 203 void *arg; 204{ 205 int irq, s; 206 struct sacc_softc *sc = (struct sacc_softc *)ic; 207 struct sacc_intrhand *ih, **p; 208 209 ih = (struct sacc_intrhand *)arg; 210 irq = ih->ih_irq; 211 212#ifdef DIAGNOSTIC 213 if (irq < 0 || irq > SACCIC_LEN) 214 panic("sacc_intr_disestablish: bogus irq"); 215#endif 216 217 s = splhigh(); 218 219 for(p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) { 220 if (*p == NULL) 221 panic("sacc_intr_disestablish: handler not registered"); 222 if (*p == ih) 223 break; 224 } 225 *p = (*p)->ih_next; 226 227 sacc_intr_calculatemasks(sc); 228 splx(s); 229 230 free(ih, M_DEVBUF); 231} 232 233void 234sacc_intr_setpolarity(ic, irq, type) 235 sacc_chipset_tag_t *ic; 236 int irq; 237 int type; 238{ 239 struct sacc_softc *sc = (struct sacc_softc *)ic; 240 int s; 241 u_int32_t pol, mask; 242 int addr; 243 244 if (irq >= 32) { 245 addr = SACCIC_INTPOL1; 246 irq -= 32; 247 } else 248 addr = SACCIC_INTPOL0; 249 250 mask = (1 << irq); 251 252 s = splhigh(); 253 pol = bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr); 254 if (type == IST_EDGE_RAISE) 255 pol &= ~mask; 256 else 257 pol |= mask; 258 bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, pol); 259 splx(s); 260} 261 262void 263sacc_intr_calculatemasks(sc) 264 struct sacc_softc *sc; 265{ 266 int irq; 267 268 sc->sc_imask.lo = 0; 269 sc->sc_imask.hi = 0; 270 for(irq = 0; irq < 32; irq++) 271 if (sc->sc_intrhand[irq]) 272 sc->sc_imask.lo |= (1 << irq); 273 for(irq = 0; irq < SACCIC_LEN - 32; irq++) 274 if (sc->sc_intrhand[irq + 32]) 275 sc->sc_imask.hi |= (1 << irq); 276 277 278 /* XXX this should not be done here */ 279 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 280 sc->sc_imask.lo); 281 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 282 sc->sc_imask.hi); 283 DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask.lo, 284 sc->sc_imask.hi)); 285} 286