1/* $NetBSD: rk_usb.c,v 1.13 2021/08/07 16:18:45 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30
31__KERNEL_RCSID(0, "$NetBSD: rk_usb.c,v 1.13 2021/08/07 16:18:45 thorpej Exp $");
32
33#include <sys/param.h>
34#include <sys/bus.h>
35#include <sys/device.h>
36#include <sys/intr.h>
37#include <sys/systm.h>
38#include <sys/time.h>
39#include <sys/kmem.h>
40
41#include <dev/clk/clk_backend.h>
42
43#include <dev/fdt/fdtvar.h>
44#include <dev/fdt/syscon.h>
45
46static int rk_usb_match(device_t, cfdata_t, void *);
47static void rk_usb_attach(device_t, device_t, void *);
48
49#define	RK3328_CON0_REG			0x100
50#define	RK3328_CON1_REG			0x104
51#define	RK3328_CON2_REG			0x108
52#define	 RK3328_USBPHY_COMMONONN	__BIT(4)
53
54#define	RK3399_GRF_USB20_PHY0_CON0_REG	0x0e450
55#define	RK3399_GRF_USB20_PHY1_CON0_REG	0x0e460
56#define	 RK3399_USBPHY_COMMONONN	__BIT(4)
57#define	RK3399_GRF_USB20_PHY0_CON1_REG	0x0e454
58#define	RK3399_GRF_USB20_PHY1_CON1_REG	0x0e464
59#define	RK3399_GRF_USB20_PHY0_CON2_REG	0x0e458
60#define	RK3399_GRF_USB20_PHY1_CON2_REG	0x0e468
61#define	 RK3399_USBPHY_SUSPEND_N	__BIT(1)
62#define	 RK3399_USBPHY_UTMI_SEL		__BIT(0)
63
64#define	RK3399_PHY_NO(_sc)	((_sc)->sc_reg == 0xe450 ? 0 : 1)
65
66enum rk_usb_type {
67	USB_RK3328 = 1,
68	USB_RK3399,
69};
70
71static const struct device_compatible_entry compat_data[] = {
72	{ .compat = "rockchip,rk3328-usb2phy",	.value = USB_RK3328 },
73	{ .compat = "rockchip,rk3399-usb2phy",	.value = USB_RK3399 },
74	DEVICE_COMPAT_EOL
75};
76
77struct rk_usb_clk {
78	struct clk		base;
79};
80
81struct rk_usb_softc {
82	device_t		sc_dev;
83	struct syscon		*sc_syscon;
84	enum rk_usb_type	sc_type;
85
86	struct clk_domain	sc_clkdom;
87	struct rk_usb_clk	sc_usbclk;
88
89	bus_addr_t		sc_reg;
90};
91
92CFATTACH_DECL_NEW(rk_usb, sizeof(struct rk_usb_softc),
93	rk_usb_match, rk_usb_attach, NULL, NULL);
94
95static struct clk *
96rk_usb_clk_get(void *priv, const char *name)
97{
98	struct rk_usb_softc * const sc = priv;
99
100	if (strcmp(name, sc->sc_usbclk.base.name) != 0)
101		return NULL;
102
103	return &sc->sc_usbclk.base;
104}
105
106static void
107rk_usb_clk_put(void *priv, struct clk *clk)
108{
109}
110
111static u_int
112rk_usb_clk_get_rate(void *priv, struct clk *clk)
113{
114	return 480000000;
115}
116
117static int
118rk_usb_clk_enable(void *priv, struct clk *clk)
119{
120	struct rk_usb_softc * const sc = priv;
121	uint32_t reg, write_mask, write_val;
122
123	switch (sc->sc_type) {
124	case USB_RK3328:
125		reg = RK3328_CON2_REG;
126		write_mask = RK3328_USBPHY_COMMONONN << 16;
127		write_val = 0;
128		break;
129	case USB_RK3399:
130		reg = RK3399_PHY_NO(sc) == 0 ?
131		    RK3399_GRF_USB20_PHY0_CON0_REG :
132		    RK3399_GRF_USB20_PHY1_CON0_REG;
133		write_mask = RK3399_USBPHY_COMMONONN << 16;
134		write_val = 0;
135		break;
136	default:
137		return ENXIO;
138	}
139
140	syscon_lock(sc->sc_syscon);
141	syscon_write_4(sc->sc_syscon, reg, write_mask | write_val);
142	syscon_unlock(sc->sc_syscon);
143
144	return 0;
145}
146
147static int
148rk_usb_clk_disable(void *priv, struct clk *clk)
149{
150	struct rk_usb_softc * const sc = priv;
151	uint32_t reg, write_mask, write_val;
152
153	switch (sc->sc_type) {
154	case USB_RK3328:
155		reg = RK3328_CON2_REG;
156		write_mask = RK3328_USBPHY_COMMONONN << 16;
157		write_val = RK3328_USBPHY_COMMONONN;
158		break;
159	case USB_RK3399:
160		reg = RK3399_PHY_NO(sc) == 0 ?
161		    RK3399_GRF_USB20_PHY0_CON0_REG :
162		    RK3399_GRF_USB20_PHY1_CON0_REG;
163		write_mask = RK3399_USBPHY_COMMONONN << 16;
164		write_val = RK3399_USBPHY_COMMONONN;
165		break;
166	default:
167		return ENXIO;
168	}
169
170	syscon_lock(sc->sc_syscon);
171	syscon_write_4(sc->sc_syscon, reg, write_mask | write_val);
172	syscon_unlock(sc->sc_syscon);
173
174	return 0;
175}
176
177static const struct clk_funcs rk_usb_clk_funcs = {
178	.get = rk_usb_clk_get,
179	.put = rk_usb_clk_put,
180	.get_rate = rk_usb_clk_get_rate,
181	.enable = rk_usb_clk_enable,
182	.disable = rk_usb_clk_disable,
183};
184
185static struct clk *
186rk_usb_fdt_decode(device_t dev, int cc_phandle, const void *data, size_t len)
187{
188	struct rk_usb_softc * const sc = device_private(dev);
189
190	if (len != 0)
191		return NULL;
192
193	return &sc->sc_usbclk.base;
194}
195
196static const struct fdtbus_clock_controller_func rk_usb_fdt_funcs = {
197	.decode = rk_usb_fdt_decode
198};
199
200static int
201rk_usb_match(device_t parent, cfdata_t cf, void *aux)
202{
203	struct fdt_attach_args * const faa = aux;
204
205	return of_compatible_match(faa->faa_phandle, compat_data);
206}
207
208static void
209rk_usb_attach(device_t parent, device_t self, void *aux)
210{
211	struct rk_usb_softc * const sc = device_private(self);
212	struct fdt_attach_args * const faa = aux;
213	const int phandle = faa->faa_phandle;
214	struct clk *clk;
215	int child;
216
217	/* Cache the base address of this PHY so we know which instance we are */
218	if (fdtbus_get_reg(phandle, 0, &sc->sc_reg, NULL) != 0) {
219		aprint_error(": couldn't get registers\n");
220		return;
221	}
222
223	clk = fdtbus_clock_get(phandle, "phyclk");
224	if (clk && clk_enable(clk) != 0) {
225		aprint_error(": couldn't enable phy clock\n");
226		return;
227	}
228
229	sc->sc_dev = self;
230	sc->sc_type = of_compatible_lookup(phandle, compat_data)->value;
231	sc->sc_syscon = fdtbus_syscon_lookup(OF_parent(phandle));
232	if (sc->sc_syscon == NULL) {
233		aprint_error(": couldn't get grf syscon\n");
234		return;
235	}
236
237	const char *clkname = fdtbus_get_string(phandle, "clock-output-names");
238	if (clkname == NULL)
239		clkname = faa->faa_name;
240
241	sc->sc_clkdom.name = device_xname(self);
242	sc->sc_clkdom.funcs = &rk_usb_clk_funcs;
243	sc->sc_clkdom.priv = sc;
244	sc->sc_usbclk.base.domain = &sc->sc_clkdom;
245	sc->sc_usbclk.base.name = kmem_asprintf("%s", clkname);
246	clk_attach(&sc->sc_usbclk.base);
247
248	aprint_naive("\n");
249	aprint_normal(": USB2 PHY\n");
250
251	fdtbus_register_clock_controller(self, phandle, &rk_usb_fdt_funcs);
252
253	for (child = OF_child(phandle); child; child = OF_peer(child)) {
254		if (!fdtbus_status_okay(child))
255			continue;
256
257		struct fdt_attach_args cfaa = *faa;
258		cfaa.faa_phandle = child;
259		cfaa.faa_name = fdtbus_get_string(child, "name");
260		cfaa.faa_quiet = false;
261
262		config_found(self, &cfaa, NULL, CFARGS_NONE);
263	}
264}
265
266/*
267 * USB PHY
268 */
269
270static int rk_usbphy_match(device_t, cfdata_t, void *);
271static void rk_usbphy_attach(device_t, device_t, void *);
272
273struct rk_usbphy_softc {
274	device_t	sc_dev;
275	int		sc_phandle;
276	struct fdtbus_regulator *sc_supply;
277};
278
279CFATTACH_DECL_NEW(rk_usbphy, sizeof(struct rk_usbphy_softc),
280	rk_usbphy_match, rk_usbphy_attach, NULL, NULL);
281
282static void *
283rk_usbphy_acquire(device_t dev, const void *data, size_t len)
284{
285	struct rk_usbphy_softc * const sc = device_private(dev);
286
287	if (len != 0)
288		return NULL;
289
290	return sc;
291}
292
293static void
294rk_usbphy_release(device_t dev, void *priv)
295{
296}
297
298static int
299rk_usbphy_otg_enable(device_t dev, void *priv, bool enable)
300{
301	struct rk_usbphy_softc * const sc = device_private(dev);
302	struct rk_usb_softc * const usb_sc = device_private(device_parent(dev));
303	uint32_t reg, write_mask, write_val;
304	int error;
305
306	switch (usb_sc->sc_type) {
307	case USB_RK3328:
308		reg = RK3328_CON0_REG;
309		write_mask = 0x1ffU << 16;
310		write_val = enable ? 0 : 0x1d1;
311		break;
312	case USB_RK3399:
313		reg = RK3399_PHY_NO(usb_sc) == 0 ?
314		    RK3399_GRF_USB20_PHY0_CON1_REG :
315		    RK3399_GRF_USB20_PHY1_CON1_REG;
316		write_mask = (RK3399_USBPHY_SUSPEND_N|RK3399_USBPHY_UTMI_SEL) << 16;
317		write_val = enable ? 0 : RK3399_USBPHY_UTMI_SEL;
318		break;
319	default:
320		return ENXIO;
321	}
322
323	if (sc->sc_supply) {
324		error = enable ? fdtbus_regulator_enable(sc->sc_supply) :
325				 fdtbus_regulator_disable(sc->sc_supply);
326		if (error != 0)
327			return error;
328	}
329
330	syscon_lock(usb_sc->sc_syscon);
331	syscon_write_4(usb_sc->sc_syscon, reg, write_mask | write_val);
332	syscon_unlock(usb_sc->sc_syscon);
333
334	return 0;
335}
336
337static int
338rk_usbphy_host_enable(device_t dev, void *priv, bool enable)
339{
340	struct rk_usbphy_softc * const sc = device_private(dev);
341	struct rk_usb_softc * const usb_sc = device_private(device_parent(dev));
342	uint32_t reg, write_mask, write_val;
343	int error;
344
345	switch (usb_sc->sc_type) {
346	case USB_RK3328:
347		reg = RK3328_CON1_REG;
348		write_mask = 0x1ffU << 16;
349		write_val = enable ? 0 : 0x1d1;
350		break;
351	case USB_RK3399:
352		reg = RK3399_PHY_NO(usb_sc) == 0 ?
353		    RK3399_GRF_USB20_PHY0_CON2_REG :
354		    RK3399_GRF_USB20_PHY1_CON2_REG;
355		write_mask = (RK3399_USBPHY_SUSPEND_N|RK3399_USBPHY_UTMI_SEL) << 16;
356		write_val = enable ? 0 : RK3399_USBPHY_UTMI_SEL;
357		break;
358	default:
359		return ENXIO;
360	}
361
362	if (sc->sc_supply) {
363		error = enable ? fdtbus_regulator_enable(sc->sc_supply) :
364				 fdtbus_regulator_disable(sc->sc_supply);
365		if (error != 0)
366			return error;
367	}
368
369	syscon_lock(usb_sc->sc_syscon);
370	syscon_write_4(usb_sc->sc_syscon, reg, write_mask | write_val);
371	syscon_unlock(usb_sc->sc_syscon);
372
373	return 0;
374}
375
376const struct fdtbus_phy_controller_func rk_usbphy_otg_funcs = {
377	.acquire = rk_usbphy_acquire,
378	.release = rk_usbphy_release,
379	.enable = rk_usbphy_otg_enable,
380};
381
382const struct fdtbus_phy_controller_func rk_usbphy_host_funcs = {
383	.acquire = rk_usbphy_acquire,
384	.release = rk_usbphy_release,
385	.enable = rk_usbphy_host_enable,
386};
387
388static int
389rk_usbphy_match(device_t parent, cfdata_t cf, void *aux)
390{
391	struct fdt_attach_args * const faa = aux;
392	const int phandle = faa->faa_phandle;
393	const char *name = fdtbus_get_string(phandle, "name");
394
395	if (strcmp(name, "otg-port") == 0 || strcmp(name, "host-port") == 0)
396		return 1;
397
398	return 0;
399}
400
401static void
402rk_usbphy_attach(device_t parent, device_t self, void *aux)
403{
404	struct rk_usbphy_softc * const sc = device_private(self);
405	struct fdt_attach_args * const faa = aux;
406	const int phandle = faa->faa_phandle;
407	const char *name = fdtbus_get_string(phandle, "name");
408
409	sc->sc_dev = self;
410	sc->sc_phandle = phandle;
411	if (of_hasprop(phandle, "phy-supply")) {
412		sc->sc_supply = fdtbus_regulator_acquire(phandle, "phy-supply");
413		if (sc->sc_supply == NULL) {
414			aprint_error(": couldn't acquire regulator\n");
415			return;
416		}
417	}
418
419	aprint_naive("\n");
420
421	if (strcmp(name, "otg-port") == 0) {
422		aprint_normal(": USB2 OTG port\n");
423		fdtbus_register_phy_controller(self, phandle, &rk_usbphy_otg_funcs);
424	} else if (strcmp(name, "host-port") == 0) {
425		aprint_normal(": USB2 host port\n");
426		fdtbus_register_phy_controller(self, phandle, &rk_usbphy_host_funcs);
427	}
428}
429