1/*	$NetBSD: imx6_pwm.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $	*/
2/*-
3 * Copyright (c) 2019  Genetec Corporation.  All rights reserved.
4 * Written by Hashimoto Kenichi for Genetec Corporation.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: imx6_pwm.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $");
30
31#include <sys/types.h>
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/device.h>
35
36#include <arm/imx/imxpwmvar.h>
37
38#include <dev/fdt/fdtvar.h>
39
40struct imxpwm_fdt_softc {
41	struct imxpwm_softc sc_imxpwm; /* Must be first */
42};
43
44static int imx6_pwm_match(device_t, cfdata_t, void *);
45static void imx6_pwm_attach(device_t, device_t, void *);
46
47CFATTACH_DECL_NEW(imxpwm_fdt, sizeof(struct imxpwm_fdt_softc),
48    imx6_pwm_match, imx6_pwm_attach, NULL, NULL);
49
50static pwm_tag_t
51imxpwm_get_tag(device_t dev, const void *data, size_t len)
52{
53	struct imxpwm_fdt_softc * const ifsc = device_private(dev);
54	struct imxpwm_softc * const sc = &ifsc->sc_imxpwm;
55	const u_int *pwm = data;
56
57	if (len < 12)
58		return NULL;
59
60	const u_int index = be32toh(pwm[1]);
61	if (index != 0)
62		return NULL;
63	const u_int period = be32toh(pwm[2]);
64
65	sc->sc_conf.period = period;
66	if (len >= 16) {
67		const u_int polarity = be32toh(pwm[3]);
68		sc->sc_conf.period = polarity ? PWM_ACTIVE_LOW : PWM_ACTIVE_HIGH;
69	}
70
71	return &sc->sc_pwm;
72}
73
74static struct fdtbus_pwm_controller_func imxpwm_funcs = {
75	.get_tag = imxpwm_get_tag
76};
77
78static const struct device_compatible_entry compat_data[] = {
79	{ .compat = "fsl,imx6q-pwm" },
80	DEVICE_COMPAT_EOL
81};
82
83static int
84imx6_pwm_match(device_t parent, cfdata_t cf, void *aux)
85{
86	struct fdt_attach_args * const faa = aux;
87
88	return of_compatible_match(faa->faa_phandle, compat_data);
89}
90
91void
92imx6_pwm_attach(device_t parent, device_t self, void *aux)
93{
94	struct imxpwm_fdt_softc * const ifsc = device_private(self);
95	struct imxpwm_softc * const sc = &ifsc->sc_imxpwm;
96	struct fdt_attach_args * const faa = aux;
97	const int phandle = faa->faa_phandle;
98	char intrstr[128];
99	bus_addr_t addr;
100	bus_size_t size;
101	int error;
102
103	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
104		aprint_error(": couldn't get PWM registers\n");
105		return;
106	}
107
108	sc->sc_dev = self;
109	sc->sc_iot = faa->faa_bst;
110
111	error = bus_space_map(sc->sc_iot, addr, size, 0,
112	    &sc->sc_ioh);
113	if (error) {
114		aprint_error(": couldn't map gpc registers: %d\n", error);
115		return;
116	}
117
118	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
119		aprint_error_dev(self, "failed to decode interrupt\n");
120		return;
121	}
122
123	sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
124	    0, imxpwm_intr, sc, device_xname(self));
125	if (sc->sc_ih == NULL) {
126		aprint_error_dev(self, "failed to establish interrupt on %s\n",
127		    intrstr);
128		return;
129	}
130	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
131
132	sc->sc_clk = fdtbus_clock_get(phandle, "per");
133	if (sc->sc_clk == NULL) {
134		aprint_error(": couldn't get clk\n");
135		return;
136	}
137	sc->sc_freq = clk_get_rate(sc->sc_clk);
138
139	imxpwm_attach_common(sc);
140
141	fdtbus_register_pwm_controller(self, phandle,
142	    &imxpwm_funcs);
143
144	return;
145}
146
147