1/* $NetBSD: a9tmr_intr.h,v 1.1 2012/09/01 00:03:14 matt Exp $ */ 2/*- 3 * Copyright (c) 2013 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas of 3am Software Foundry. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#ifndef _ARM_CORTEX_GTMR_INTR_H_ 32#define _ARM_CORTEX_GTMR_INTR_H_ 33 34/* 35 * The ARM Generic Timer defines 4 PPIs (Private Peripheral Interrupts). 36 * These are same for the A7 and A15 mpcores. 37 */ 38 39#define IRQ_GTMR_PPI_HTIMER 26 // Hypervisor Timer 40#define IRQ_GTMR_PPI_VTIMER 27 // Virtual Timer 41#define IRQ_GTMR_PPI_PTIMER_S 29 // Secure Physical Timer 42#define IRQ_GTMR_PPI_PTIMER_NS 30 // Non-Secure Physical Timer 43 44#endif /* _ARM_CORTEX_GTMR_INTR_H_ */ 45