1/* $NetBSD: gic_splfuncs.c,v 1.5 2021/10/30 18:44:24 jmcneill Exp $ */ 2 3/*- 4 * Copyright (c) 2021 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__KERNEL_RCSID(0, "$NetBSD: gic_splfuncs.c,v 1.5 2021/10/30 18:44:24 jmcneill Exp $"); 31 32#include <sys/param.h> 33#include <sys/atomic.h> 34#include <sys/kernel.h> 35#include <sys/lwp.h> 36 37#include <arm/pic/picvar.h> 38#include <arm/cpu.h> 39#include <arm/cpufunc.h> 40#include <arm/locore.h> 41 42#include <arm/cortex/gic_splfuncs.h> 43 44/* Prototypes for functions in gic_splfuncs_<arch>.S */ 45int gic_splraise(int); 46void gic_splx(int); 47 48/* Local functions */ 49void Xgic_splx(int); 50 51static int 52gic_spllower(int newipl) 53{ 54 struct cpu_info * const ci = curcpu(); 55 const int oldipl = ci->ci_cpl; 56 KASSERT(panicstr || newipl <= ci->ci_cpl); 57 if (newipl < ci->ci_cpl) { 58 register_t psw = DISABLE_INTERRUPT_SAVE(); 59 ci->ci_intr_depth++; 60 pic_do_pending_ints(psw, newipl, NULL); 61 ci->ci_intr_depth--; 62 if ((psw & I32_bit) == 0 || newipl == IPL_NONE) { 63 ENABLE_INTERRUPT(); 64 } 65 cpu_dosoftints(); 66 } 67 68 return oldipl; 69} 70 71void 72Xgic_splx(int newipl) 73{ 74 struct cpu_info *ci = curcpu(); 75 register_t psw; 76 77 if (newipl >= ci->ci_cpl) { 78 return; 79 } 80 81 psw = DISABLE_INTERRUPT_SAVE(); 82 ci->ci_intr_depth++; 83 pic_do_pending_ints(psw, newipl, NULL); 84 ci->ci_intr_depth--; 85 if ((psw & I32_bit) == 0) { 86 ENABLE_INTERRUPT(); 87 } 88 89 cpu_dosoftints(); 90} 91 92void 93gic_spl_init(void) 94{ 95 pic_splraise = gic_splraise; 96 pic_spllower = gic_spllower; 97 pic_splx = gic_splx; 98} 99