1/*	$NetBSD: bcmgen_space.c,v 1.8 2023/04/21 15:00:48 skrll Exp $	*/
2
3/*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Nick Hudson
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32
33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.8 2023/04/21 15:00:48 skrll Exp $");
35
36#include <sys/param.h>
37#include <sys/systm.h>
38
39#include <uvm/uvm_extern.h>
40
41#include <sys/bus.h>
42#include <sys/endian.h>
43
44/* Prototypes for all the bus_space structure functions */
45bs_protos(bcmgen);
46bs_protos(generic);
47bs_protos(generic_armv4);
48bs_protos(bs_notimpl);
49
50#if BYTE_ORDER == BIG_ENDIAN
51#define NSWAP(n)	n ## _swap
52#else
53#define NSWAP(n)	n
54#endif
55
56struct bus_space bcmgen_bs_tag = {
57	/* cookie */
58	.bs_cookie = (void *) 0,
59
60	/* mapping/unmapping */
61	.bs_map = bcmgen_bs_map,
62	.bs_unmap = bcmgen_bs_unmap,
63	.bs_subregion = bcmgen_bs_subregion,
64
65	/* allocation/deallocation */
66	.bs_alloc = bcmgen_bs_alloc,	/* not implemented */
67	.bs_free = bcmgen_bs_free,	/* not implemented */
68
69	/* get kernel virtual address */
70	.bs_vaddr = bcmgen_bs_vaddr,
71
72	/* mmap */
73	.bs_mmap = bs_notimpl_bs_mmap,
74
75	/* barrier */
76	.bs_barrier = bcmgen_bs_barrier,
77
78	/* read (single) */
79	.bs_r_1 = generic_bs_r_1,
80	.bs_r_2 = NSWAP(generic_armv4_bs_r_2),
81	.bs_r_4 = NSWAP(generic_bs_r_4),
82	.bs_r_8 = bs_notimpl_bs_r_8,
83
84	/* read multiple */
85	.bs_rm_1 = generic_bs_rm_1,
86	.bs_rm_2 = NSWAP(generic_armv4_bs_rm_2),
87	.bs_rm_4 = NSWAP(generic_bs_rm_4),
88	.bs_rm_8 = bs_notimpl_bs_rm_8,
89
90	/* read region */
91	.bs_rr_1 = generic_bs_rr_1,
92	.bs_rr_2 = NSWAP(generic_armv4_bs_rr_2),
93	.bs_rr_4 = NSWAP(generic_bs_rr_4),
94	.bs_rr_8 = bs_notimpl_bs_rr_8,
95
96	/* write (single) */
97	.bs_w_1 = generic_bs_w_1,
98	.bs_w_2 = NSWAP(generic_armv4_bs_w_2),
99	.bs_w_4 = NSWAP(generic_bs_w_4),
100	.bs_w_8 = bs_notimpl_bs_w_8,
101
102	/* write multiple */
103	.bs_wm_1 = generic_bs_wm_1,
104	.bs_wm_2 = NSWAP(generic_armv4_bs_wm_2),
105	.bs_wm_4 = NSWAP(generic_bs_wm_4),
106	.bs_wm_8 = bs_notimpl_bs_wm_8,
107
108	/* write region */
109	.bs_wr_1 = generic_bs_wr_1,
110	.bs_wr_2 = NSWAP(generic_armv4_bs_wr_2),
111	.bs_wr_4 = NSWAP(generic_bs_wr_4),
112	.bs_wr_8 = bs_notimpl_bs_wr_8,
113
114	/* set multiple */
115	.bs_sm_1 = bs_notimpl_bs_sm_1,
116	.bs_sm_2 = bs_notimpl_bs_sm_2,
117	.bs_sm_4 = bs_notimpl_bs_sm_4,
118	.bs_sm_8 = bs_notimpl_bs_sm_8,
119
120	/* set region */
121	.bs_sr_1 = generic_bs_sr_1,
122	.bs_sr_2 = NSWAP(generic_armv4_bs_sr_2),
123	.bs_sr_4 = bs_notimpl_bs_sr_4,
124	.bs_sr_8 = bs_notimpl_bs_sr_8,
125
126	/* copy */
127	.bs_c_1 = bs_notimpl_bs_c_1,
128	.bs_c_2 = generic_armv4_bs_c_2,
129	.bs_c_4 = bs_notimpl_bs_c_4,
130	.bs_c_8 = bs_notimpl_bs_c_8,
131
132#ifdef __BUS_SPACE_HAS_STREAM_METHODS
133	/* read (single) */
134	.bs_r_1_s = generic_bs_r_1,
135	.bs_r_2_s = NSWAP(generic_armv4_bs_r_2),
136	.bs_r_4_s = NSWAP(generic_bs_r_4),
137	.bs_r_8_s = bs_notimpl_bs_r_8,
138
139	/* read multiple */
140	.bs_rm_1_s = generic_bs_rm_1,
141	.bs_rm_2_s = NSWAP(generic_armv4_bs_rm_2),
142	.bs_rm_4_s = NSWAP(generic_bs_rm_4),
143	.bs_rm_8_s = bs_notimpl_bs_rm_8,
144
145	/* read region */
146	.bs_rr_1_s = generic_bs_rr_1,
147	.bs_rr_2_s = NSWAP(generic_armv4_bs_rr_2),
148	.bs_rr_4_s = NSWAP(generic_bs_rr_4),
149	.bs_rr_8_s = bs_notimpl_bs_rr_8,
150
151	/* write (single) */
152	.bs_w_1_s = generic_bs_w_1,
153	.bs_w_2_s = NSWAP(generic_armv4_bs_w_2),
154	.bs_w_4_s = NSWAP(generic_bs_w_4),
155	.bs_w_8_s = bs_notimpl_bs_w_8,
156
157	/* write multiple */
158	.bs_wm_1_s = generic_bs_wm_1,
159	.bs_wm_2_s = NSWAP(generic_armv4_bs_wm_2),
160	.bs_wm_4_s = NSWAP(generic_bs_wm_4),
161	.bs_wm_8_s = bs_notimpl_bs_wm_8,
162
163	/* write region */
164	.bs_wr_1_s = generic_bs_wr_1,
165	.bs_wr_2_s = NSWAP(generic_armv4_bs_wr_2),
166	.bs_wr_4_s = NSWAP(generic_bs_wr_4),
167	.bs_wr_8_s = bs_notimpl_bs_wr_8,
168#endif
169};
170
171int
172bcmgen_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
173    bus_space_handle_t *bshp)
174{
175	u_long startpa, endpa, pa;
176	const struct pmap_devmap *pd;
177	vaddr_t va;
178
179	if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
180		/* Device was statically mapped. */
181		*bshp = pd->pd_va + (bpa - pd->pd_pa);
182		return 0;
183	}
184
185	startpa = trunc_page(bpa);
186	endpa = round_page(bpa + size);
187
188	/* XXX use extent manager to check duplicate mapping */
189
190	va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
191	    UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH);
192	if (!va)
193		return ENOMEM;
194
195	*bshp = (bus_space_handle_t)(va + (bpa - startpa));
196
197	const int pmapflags =
198	    (flag & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
199		? 0
200		: PMAP_NOCACHE;
201	for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
202		pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
203	}
204	pmap_update(pmap_kernel());
205
206	return 0;
207}
208
209void
210bcmgen_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
211{
212	vaddr_t	va;
213	vsize_t	sz;
214
215	if (pmap_devmap_find_va(bsh, size) != NULL) {
216		/* Device was statically mapped; nothing to do. */
217		return;
218	}
219
220	va = trunc_page(bsh);
221	sz = round_page(bsh + size) - va;
222
223	pmap_kremove(va, sz);
224	pmap_update(pmap_kernel());
225	uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
226}
227
228
229int
230bcmgen_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
231    bus_size_t size, bus_space_handle_t *nbshp)
232{
233
234	*nbshp = bsh + offset;
235	return (0);
236}
237
238void
239bcmgen_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
240    bus_size_t len, int flags)
241{
242	flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
243
244	if (flags)
245		dsb(sy);
246}
247
248void *
249bcmgen_bs_vaddr(void *t, bus_space_handle_t bsh)
250{
251
252	return (void *)bsh;
253}
254
255paddr_t
256bcmgen_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
257{
258	paddr_t bus_flags = 0;
259
260	if (flags & BUS_SPACE_MAP_PREFETCHABLE)
261		bus_flags |= ARM32_MMAP_WRITECOMBINE;
262
263	return (arm_btop(bpa + offset) | bus_flags);
264}
265
266int
267bcmgen_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
268    bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
269    bus_addr_t *bpap, bus_space_handle_t *bshp)
270{
271
272	panic("%s(): not implemented\n", __func__);
273}
274
275void
276bcmgen_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
277{
278
279	panic("%s(): not implemented\n", __func__);
280}
281