1/* $NetBSD: acpi_pci_machdep.h,v 1.8 2021/08/07 21:27:53 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill@invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _ARM_ACPI_PCI_MACHDEP_H
33#define _ARM_ACPI_PCI_MACHDEP_H
34
35extern struct arm32_pci_chipset arm_acpi_pci_chipset;
36
37struct acpi_pci_context {
38	struct arm32_pci_chipset ap_pc;
39	device_t ap_dev;
40	u_int ap_seg;
41	int ap_bus;
42	int ap_maxbus;
43	bus_space_tag_t ap_bst;
44	bus_space_handle_t ap_conf_bsh;
45	int (*ap_conf_read)(pci_chipset_tag_t, pcitag_t, int, pcireg_t *);
46	int (*ap_conf_write)(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
47	void *ap_conf_priv;
48	int ap_pciflags_clear;
49	u_int ap_flags;
50#define	ACPI_PCI_FLAG_NO_MCFG		__BIT(0)	/* ignore MCFG table */
51};
52
53struct acpi_pci_quirk {
54	const char			q_oemid[ACPI_OEM_ID_SIZE+1];
55	const char			q_oemtableid[ACPI_OEM_TABLE_ID_SIZE+1];
56	uint32_t			q_oemrevision;
57	int				q_segment;
58	void				(*q_init)(struct acpi_pci_context *);
59};
60
61const struct acpi_pci_quirk *	acpi_pci_md_find_quirk(int);
62
63void	acpi_pci_smccc_init(struct acpi_pci_context *);
64void	acpi_pci_graviton_init(struct acpi_pci_context *);
65void	acpi_pci_layerscape_gen4_init(struct acpi_pci_context *);
66void	acpi_pci_n1sdp_init(struct acpi_pci_context *);
67
68#endif /* !_ARM_ACPI_PCI_MACHDEP_H */
69