necpb.c revision 1.43 
1/*	$NetBSD: necpb.c,v 1.43 2019/11/10 21:16:23 chs Exp $	*/
2
3/*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
35 * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 *    notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 *    notice, this list of conditions and the following disclaimer in the
44 *    documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 *    must display the following acknowledgement:
47 *	This product includes software developed by Charles M. Hannum.
48 * 4. The name of the author may not be used to endorse or promote products
49 *    derived from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 */
62
63#include <sys/cdefs.h>
64__KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.43 2019/11/10 21:16:23 chs Exp $");
65
66#include "opt_pci.h"
67
68#include <sys/types.h>
69#include <sys/param.h>
70#include <sys/time.h>
71#include <sys/systm.h>
72#include <sys/errno.h>
73#include <sys/device.h>
74#include <sys/malloc.h>
75#include <sys/extent.h>
76
77#include <uvm/uvm_extern.h>
78
79#define _ARC_BUS_DMA_PRIVATE
80#include <sys/bus.h>
81
82#include <machine/pio.h>
83
84#include <machine/autoconf.h>
85#include <machine/cpu.h>
86#include <machine/platform.h>
87
88#include <mips/cache.h>
89
90#include <dev/pci/pcivar.h>
91#include <dev/pci/pcireg.h>
92#include <dev/pci/pcidevs.h>
93#ifdef PCI_NETBSD_CONFIGURE
94#include <dev/pci/pciconf.h>
95#endif
96
97#include <arc/jazz/rd94.h>
98#include <arc/pci/necpbvar.h>
99
100#include "ioconf.h"
101
102static int	necpbmatch(device_t, cfdata_t, void *);
103static void	necpbattach(device_t, device_t, void *);
104
105static void	necpb_attach_hook(device_t, device_t,
106		    struct pcibus_attach_args *);
107static int	necpb_bus_maxdevs(pci_chipset_tag_t, int);
108static pcitag_t	necpb_make_tag(pci_chipset_tag_t, int, int, int);
109static void	necpb_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
110		    int *, int *);
111static pcireg_t	necpb_conf_read(pci_chipset_tag_t, pcitag_t, int);
112static void	necpb_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
113static int	necpb_intr_map(const struct pci_attach_args *,
114		    pci_intr_handle_t *);
115static const char *necpb_intr_string(pci_chipset_tag_t, pci_intr_handle_t,
116		    char *, size_t);
117static void	*necpb_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
118		    int, int (*func)(void *), void *);
119static void	necpb_intr_disestablish(pci_chipset_tag_t, void *);
120#ifdef PCI_NETBSD_CONFIGURE
121static void	necpb_conf_interrupt(pci_chipset_tag_t, int, int, int, int,
122		    int *);
123static int	necpb_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t);
124#endif
125
126static uint32_t	necpb_intr(uint32_t, struct clockframe *);
127
128
129CFATTACH_DECL_NEW(necpb, sizeof(struct necpb_softc),
130    necpbmatch, necpbattach, NULL, NULL);
131
132static struct necpb_intrhand	*necpb_inttbl[4];
133
134/* There can be only one. */
135int necpbfound;
136struct necpb_context necpb_main_context;
137static long necpb_mem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)];
138static long necpb_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)];
139
140static int
141necpbmatch(device_t parent, cfdata_t cf, void *aux)
142{
143	struct confargs *ca = aux;
144
145	if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0)
146		return 0;
147
148	if (necpbfound)
149		return 0;
150
151	return 1;
152}
153
154/*
155 * Set up the chipset's function pointers.
156 */
157void
158necpb_init(struct necpb_context *ncp)
159{
160	pci_chipset_tag_t pc;
161#ifndef PCI_NETBSD_CONFIGURE
162	pcitag_t tag;
163	pcireg_t id, class, csr;
164	u_int dev;
165#endif
166
167	if (ncp->nc_initialized)
168		return;
169
170	arc_large_bus_space_init(&ncp->nc_memt, "necpcimem",
171	    RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM);
172	arc_bus_space_init_extent(&ncp->nc_memt, (void *)necpb_mem_ex_storage,
173	    sizeof(necpb_mem_ex_storage));
174
175	arc_bus_space_init(&ncp->nc_iot, "necpciio",
176	    RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO);
177	arc_bus_space_init_extent(&ncp->nc_iot, (void *)necpb_io_ex_storage,
178	    sizeof(necpb_io_ex_storage));
179
180	jazz_bus_dma_tag_init(&ncp->nc_dmat);
181
182	pc = &ncp->nc_pc;
183	pc->pc_attach_hook = necpb_attach_hook;
184	pc->pc_bus_maxdevs = necpb_bus_maxdevs;
185	pc->pc_make_tag = necpb_make_tag;
186	pc->pc_decompose_tag = necpb_decompose_tag;
187	pc->pc_conf_read = necpb_conf_read;
188	pc->pc_conf_write = necpb_conf_write;
189	pc->pc_intr_map = necpb_intr_map;
190	pc->pc_intr_string = necpb_intr_string;
191	pc->pc_intr_establish = necpb_intr_establish;
192	pc->pc_intr_disestablish = necpb_intr_disestablish;
193#ifdef PCI_NETBSD_CONFIGURE
194	pc->pc_conf_interrupt = necpb_conf_interrupt;
195	pc->pc_conf_hook = necpb_conf_hook;
196#endif
197
198#ifndef PCI_NETBSD_CONFIGURE
199	/*
200	 * XXX:
201	 *  NEC's firmware does not configure PCI devices completely.
202	 *  We need to disable expansion ROM and enable mem/io/busmaster
203	 *  bits here.
204	 */
205	for (dev = 3; dev <= 5; dev++) {
206		tag = necpb_make_tag(pc, 0, dev, 0);
207		id = necpb_conf_read(pc, tag, PCI_ID_REG);
208
209		if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
210			continue;
211
212		class = necpb_conf_read(pc, tag, PCI_CLASS_REG);
213		csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
214		if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
215		    PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_PCI) {
216			csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
217			necpb_conf_write(pc, tag, PCI_MAPREG_ROM, 0);
218		}
219		csr |= PCI_COMMAND_MASTER_ENABLE;
220		necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
221	}
222#endif
223
224	ncp->nc_initialized = 1;
225}
226
227static void
228necpbattach(device_t parent, device_t self, void *aux)
229{
230	struct necpb_softc *sc = device_private(self);
231	struct pcibus_attach_args pba;
232	pci_chipset_tag_t pc;
233	int i;
234
235	sc->sc_dev = self;
236
237	necpbfound = 1;
238
239	aprint_normal("\n");
240
241	sc->sc_ncp = &necpb_main_context;
242	necpb_init(sc->sc_ncp);
243
244	pc = &sc->sc_ncp->nc_pc;
245#ifdef PCI_NETBSD_CONFIGURE
246	pc->pc_ioext = extent_create("necpbio", 0x00100000, 0x01ffffff,
247	    NULL, 0, EX_NOWAIT);
248	pc->pc_memext = extent_create("necpbmem", 0x08000000, 0x3fffffff,
249	    NULL, 0, EX_NOWAIT);
250	pci_configure_bus(pc, pc->pc_ioext, pc->pc_memext, NULL, 0,
251	    mips_cache_info.mci_dcache_align);
252#endif
253
254	out32(RD94_SYS_PCI_INTMASK, 0xf);
255
256	for (i = 0; i < 4; i++)
257		necpb_inttbl[i] = NULL;
258
259	(*platform->set_intr)(MIPS_INT_MASK_2, necpb_intr, ARC_INTPRI_PCIISA);
260
261	pba.pba_iot = &sc->sc_ncp->nc_iot;
262	pba.pba_memt = &sc->sc_ncp->nc_memt;
263	pba.pba_dmat = &sc->sc_ncp->nc_dmat;
264	pba.pba_dmat64 = NULL;
265	pba.pba_pc = pc;
266	pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
267	pba.pba_bus = 0;
268	pba.pba_bridgetag = NULL;
269
270	config_found_ia(self, "pcibus", &pba, pcibusprint);
271}
272
273static void
274necpb_attach_hook(device_t parent, device_t self,
275    struct pcibus_attach_args *pba)
276{
277}
278
279static int
280necpb_bus_maxdevs(pci_chipset_tag_t pc, int busno)
281{
282
283	return 32;
284}
285
286static pcitag_t
287necpb_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
288{
289	pcitag_t tag;
290
291	if (bus >= 256 || device >= 32 || function >= 8)
292		panic("%s: bad request", __func__);
293
294	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
295	return tag;
296}
297
298static void
299necpb_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
300   int *fp)
301{
302
303	if (bp != NULL)
304		*bp = (tag >> 16) & 0xff;
305	if (dp != NULL)
306		*dp = (tag >> 11) & 0x1f;
307	if (fp != NULL)
308		*fp = (tag >> 8) & 0x07;
309}
310
311static pcireg_t
312necpb_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
313{
314	pcireg_t data;
315	int s;
316
317	if ((unsigned int)reg >= PCI_CONF_SIZE)
318		return (pcireg_t) -1;
319
320	s = splhigh();
321	out32(RD94_SYS_PCI_CONFADDR, tag | reg);
322	data = in32(RD94_SYS_PCI_CONFDATA);
323	out32(RD94_SYS_PCI_CONFADDR, 0);
324	splx(s);
325
326	return data;
327}
328
329static void
330necpb_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
331{
332	int s;
333
334	if ((unsigned int)reg >= PCI_CONF_SIZE)
335		return;
336
337	s = splhigh();
338	out32(RD94_SYS_PCI_CONFADDR, tag | reg);
339	out32(RD94_SYS_PCI_CONFDATA, data);
340	out32(RD94_SYS_PCI_CONFADDR, 0);
341	splx(s);
342}
343
344static int
345necpb_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
346{
347	pci_chipset_tag_t pc = pa->pa_pc;
348	pcitag_t intrtag = pa->pa_intrtag;
349	int pin = pa->pa_intrpin;
350	int bus, dev;
351
352	if (pin == 0) {
353		/* No IRQ used. */
354		*ihp = -1;
355		return 1;
356	}
357
358	if (pin > 4) {
359		printf("necpb_intr_map: bad interrupt pin %d\n", pin);
360		*ihp = -1;
361		return 1;
362	}
363
364	necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL);
365	if (bus != 0) {
366		printf("necpb_intr_map: unknown bus %d\n", bus);
367		*ihp = -1;
368		return 1;
369	}
370
371	switch (dev) {
372	case 3:
373		*ihp = 3;
374		break;
375	case 4:
376		*ihp = 2;
377		break;
378	case 5:
379		*ihp = 1;
380		break;
381	default:
382		*ihp = -1;
383		return 1;
384	}
385
386	return 0;
387}
388
389static const char *
390necpb_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
391    size_t len)
392{
393	if (ih >= 4)
394		panic("%s: bogus handle %ld", __func__, ih);
395	snprintf(buf, len, "int %c", 'A' + (int)ih);
396	return buf;
397}
398
399static void *
400necpb_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
401    int (*func)(void *), void *arg)
402{
403	struct necpb_intrhand *n, *p;
404	uint32_t mask;
405	char buf[PCI_INTRSTR_LEN];
406
407	if (ih >= 4)
408		panic("%s: bogus handle", __func__);
409
410	n = malloc(sizeof(struct necpb_intrhand), M_DEVBUF, M_WAITOK);
411	n->ih_func = func;
412	n->ih_arg = arg;
413	n->ih_next = NULL;
414	n->ih_intn = ih;
415	strlcpy(n->ih_evname, necpb_intr_string(pc, ih, buf, sizeof(buf)),
416	    sizeof(n->ih_evname));
417	evcnt_attach_dynamic(&n->ih_evcnt, EVCNT_TYPE_INTR, NULL, "necpb",
418	    n->ih_evname);
419
420	if (necpb_inttbl[ih] == NULL) {
421		necpb_inttbl[ih] = n;
422		mask = in32(RD94_SYS_PCI_INTMASK);
423		mask |= 1 << ih;
424		out32(RD94_SYS_PCI_INTMASK, mask);
425	} else {
426		p = necpb_inttbl[ih];
427		while (p->ih_next != NULL)
428			p = p->ih_next;
429		p->ih_next = n;
430	}
431
432	return n;
433}
434
435static void
436necpb_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
437{
438	struct necpb_intrhand *n, *p, *q;
439	uint32_t mask;
440
441	n = cookie;
442
443	q = NULL;
444	p = necpb_inttbl[n->ih_intn];
445	while (p != n) {
446		if (p == NULL)
447			panic("%s: broken intr table", __func__);
448		q = p;
449		p = p->ih_next;
450	}
451
452	if (q == NULL) {
453		necpb_inttbl[n->ih_intn] = n->ih_next;
454		if (n->ih_next == NULL) {
455			mask = in32(RD94_SYS_PCI_INTMASK);
456			mask &= ~(1 << n->ih_intn);
457			out32(RD94_SYS_PCI_INTMASK, mask);
458		}
459	} else
460		q->ih_next = n->ih_next;
461
462	evcnt_detach(&n->ih_evcnt);
463
464	free(n, M_DEVBUF);
465}
466
467/*
468 *   Handle PCI/EISA interrupt.
469 */
470static uint32_t
471necpb_intr(uint32_t mask, struct clockframe *cf)
472{
473	uint32_t vector, stat;
474	struct necpb_intrhand *p;
475	int i, handled;
476
477	handled = 0;
478	vector = in32(RD94_SYS_INTSTAT2) & 0xffff;
479
480	if (vector == 0x4000) {
481		stat = in32(RD94_SYS_PCI_INTSTAT);
482		stat &= in32(RD94_SYS_PCI_INTMASK);
483		for (i = 0; i < 4; i++) {
484			if (stat & (1 << i)) {
485#if 0
486				printf("pint %d\n", i);
487#endif
488				p = necpb_inttbl[i];
489				while (p != NULL) {
490					if ((*p->ih_func)(p->ih_arg)) {
491						p->ih_evcnt.ev_count++;
492						handled |= 1;
493					}
494					p = p->ih_next;
495				}
496			}
497		}
498	} else if (vector == 0x8000) {
499		printf("eisa_nmi\n");
500	} else {
501		printf("eint %d\n", vector & 0xff);
502#if 0
503		if (eisa_intr(vector & 0xff)) {
504			handled |= 1;
505		}
506#endif
507	}
508
509	return handled ? MIPS_INT_MASK_2 : 0;
510}
511
512#ifdef PCI_NETBSD_CONFIGURE
513static void
514necpb_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int func,
515    int swiz, int *iline)
516{
517
518	return;
519}
520
521static int
522necpb_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
523    pcireg_t id)
524{
525
526	/* ignore bogus IDs */
527	if (id == 0)
528		return 0;
529
530	/* don't configure bridges */
531	if (bus == 0 && (dev == 1 || dev == 2))
532		return 0;
533
534	return PCI_CONF_DEFAULT;
535}
536#endif
537