1/* $NetBSD: mppb.c,v 1.13 2023/12/20 00:40:42 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 2011 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Radoslaw Kujawa. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* Matay Prometheus Zorro-PCI bridge driver. */ 33 34#include <sys/types.h> 35#include <sys/param.h> 36#include <sys/time.h> 37#include <sys/systm.h> 38#include <sys/errno.h> 39#include <sys/device.h> 40#include <sys/kmem.h> 41 42#include <uvm/uvm_extern.h> 43 44#include <machine/bus.h> 45#include <machine/cpu.h> 46 47#include <m68k/bus_dma.h> 48#include <amiga/dev/zbusvar.h> 49#include <amiga/pci/mppbreg.h> 50 51#include <dev/pci/pcivar.h> 52#include <dev/pci/pcireg.h> 53#include <dev/pci/pcidevs.h> 54#include <dev/pci/pciconf.h> 55 56#include "opt_pci.h" 57 58/* Zorro IDs */ 59#define ZORRO_MANID_MATAY 44359 60#define ZORRO_PRODID_PROMETHEUS 1 61 62struct mppb_softc { 63 device_t sc_dev; 64 volatile char *ba; 65 struct bus_space_tag pci_conf_area; 66 struct bus_space_tag pci_io_area; 67 struct bus_space_tag pci_mem_area; 68 struct amiga_pci_chipset apc; 69}; 70 71static int mppb_match(device_t, cfdata_t, void *); 72static void mppb_attach(device_t, device_t, void *); 73pcireg_t mppb_pci_conf_read(pci_chipset_tag_t, pcitag_t, int); 74void mppb_pci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 75int mppb_pci_bus_maxdevs(pci_chipset_tag_t, int); 76void mppb_pci_attach_hook (device_t, device_t, 77 struct pcibus_attach_args *pba); 78pcitag_t mppb_pci_make_tag(pci_chipset_tag_t, int, int, int); 79void mppb_pci_decompose_tag(pci_chipset_tag_t, pcitag_t, 80 int *, int *, int *); 81int mppb_pci_intr_map(const struct pci_attach_args *, 82 pci_intr_handle_t *); 83const struct evcnt * mppb_pci_intr_evcnt(pci_chipset_tag_t, 84 pci_intr_handle_t); 85 86CFATTACH_DECL_NEW(mppb, sizeof(struct mppb_softc), 87 mppb_match, mppb_attach, NULL, NULL); 88 89static int 90mppb_match(device_t parent, cfdata_t cf, void *aux) 91{ 92 struct zbus_args *zap; 93 94 zap = aux; 95 96 if (zap->manid != ZORRO_MANID_MATAY) 97 return 0; 98 99 if (zap->prodid != ZORRO_PRODID_PROMETHEUS) 100 return 0; 101 102 return 1; 103} 104 105 106static void 107mppb_attach(device_t parent, device_t self, void *aux) 108{ 109 struct mppb_softc *sc; 110 struct pcibus_attach_args pba; 111 struct zbus_args *zap; 112 pci_chipset_tag_t pc; 113 114 zap = aux; 115 sc = device_private(self); 116 pc = &sc->apc; 117 sc->sc_dev = self; 118 sc->ba = zap->va; 119 120 aprint_normal(": Matay Prometheus PCI bridge\n"); 121 122 /* Setup bus space mappings. */ 123 sc->pci_conf_area.base = (bus_addr_t) sc->ba + MPPB_CONF_BASE; 124 sc->pci_conf_area.absm = &amiga_bus_stride_1swap; 125 126 sc->pci_mem_area.base = (bus_addr_t) sc->ba + MPPB_MEM_BASE; 127 sc->pci_mem_area.absm = &amiga_bus_stride_1; 128 129 sc->pci_io_area.base = (bus_addr_t) sc->ba + MPPB_IO_BASE; 130 sc->pci_io_area.absm = &amiga_bus_stride_1; 131 132#ifdef MPPB_DEBUG 133 aprint_normal("mppb mapped conf %x->%x, mem %x->%x\n, io %x->%x\n", 134 kvtop((void*) sc->pci_conf_area.base), sc->pci_conf_area.base, 135 kvtop((void*) sc->pci_mem_area.base), sc->pci_mem_area.base, 136 kvtop((void*) sc->pci_io_area.base), sc->pci_io_area.base); 137#endif 138 139 sc->apc.pci_conf_datat = &(sc->pci_conf_area); 140 141 if (bus_space_map(sc->apc.pci_conf_datat, 0, MPPB_CONF_SIZE, 0, 142 &sc->apc.pci_conf_datah)) 143 aprint_error_dev(self, 144 "couldn't map PCI configuration data space\n"); 145 146 /* Initialize the PCI chipset tag. */ 147 sc->apc.pc_conf_v = (void*) pc; 148 sc->apc.pc_bus_maxdevs = mppb_pci_bus_maxdevs; 149 sc->apc.pc_make_tag = amiga_pci_make_tag; 150 sc->apc.pc_decompose_tag = amiga_pci_decompose_tag; 151 sc->apc.pc_conf_read = mppb_pci_conf_read; 152 sc->apc.pc_conf_write = mppb_pci_conf_write; 153 sc->apc.pc_attach_hook = mppb_pci_attach_hook; 154 155 sc->apc.pc_intr_map = mppb_pci_intr_map; 156 sc->apc.pc_intr_string = amiga_pci_intr_string; 157 sc->apc.pc_intr_establish = amiga_pci_intr_establish; 158 sc->apc.pc_intr_disestablish = amiga_pci_intr_disestablish; 159 160 sc->apc.pc_conf_hook = amiga_pci_conf_hook; 161 sc->apc.pc_conf_interrupt = amiga_pci_conf_interrupt; 162 163#ifdef PCI_NETBSD_CONFIGURE 164 struct pciconf_resources *pcires = pciconf_resource_init(); 165 166 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO, 167 MPPB_IO_BASE, MPPB_IO_SIZE); 168 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 169 MPPB_MEM_BASE, MPPB_MEM_SIZE); 170 171#ifdef MPPB_DEBUG 172 aprint_normal("mppb: reconfiguring the bus!\n"); 173#endif /* MPPB_DEBUG */ 174 pci_configure_bus(pc, pcires, 0, CACHELINE_SIZE); 175 176 pciconf_resource_fini(pcires); 177#endif /* PCI_NETBSD_CONFIGURE */ 178 179 pba.pba_iot = &(sc->pci_io_area); 180 pba.pba_memt = &(sc->pci_mem_area); 181 pba.pba_dmat = NULL; 182 pba.pba_dmat64 = NULL; 183 pba.pba_pc = pc; 184 pba.pba_flags = PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY; 185 pba.pba_bus = 0; 186 pba.pba_bridgetag = NULL; 187 188 config_found(self, &pba, pcibusprint, CFARGS_NONE); 189} 190 191pcireg_t 192mppb_pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 193{ 194 uint32_t data; 195 uint32_t bus, dev, func; 196 197 if ((unsigned int)reg >= PCI_CONF_SIZE) 198 return (pcireg_t) -1; 199 200 pci_decompose_tag(pc, tag, &bus, &dev, &func); 201 202 data = bus_space_read_4(pc->pci_conf_datat, pc->pci_conf_datah, 203 (MPPB_CONF_STRIDE*dev) + reg); 204#ifdef MPPB_DEBUG_CONF 205 aprint_normal("mppb conf read va: %lx, bus: %d, dev: %d, " 206 "func: %d, reg: %d -r-> data %x\n", 207 pc->pci_conf_datah, bus, dev, func, reg, data); 208#endif /* MPPB_DEBUG_CONF */ 209 return data; 210} 211 212void 213mppb_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val) 214{ 215 uint32_t bus, dev, func; 216 217 if ((unsigned int)reg >= PCI_CONF_SIZE) 218 return; 219 220 pci_decompose_tag(pc, tag, &bus, &dev, &func); 221 222 bus_space_write_4(pc->pci_conf_datat, pc->pci_conf_datah, 223 (MPPB_CONF_STRIDE*dev) + reg, val); 224#ifdef MPPB_DEBUG_CONF 225 aprint_normal("mppb conf write va: %lx, bus: %d, dev: %d, " 226 "func: %d, reg: %d -w-> data %x\n", 227 pc->pci_conf_datah, bus, dev, func, reg, val); 228#endif /* MPPB_DEBUG_CONF */ 229 230} 231 232int 233mppb_pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 234{ 235 return 4; /* Prometheus has 4 slots */ 236} 237 238void 239mppb_pci_attach_hook(device_t parent, device_t self, 240 struct pcibus_attach_args *pba) 241{ 242} 243 244int 245mppb_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 246{ 247 /* TODO: add sanity checking */ 248 249 *ihp = MPPB_INT; 250 return 0; 251} 252 253const struct evcnt * 254mppb_pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 255{ 256 /* TODO: implement */ 257 return NULL; 258} 259