1/* $NetBSD: pci_2100_a50.c,v 1.44 2021/06/25 13:41:33 thorpej Exp $ */
2
3/*
4 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22 *  School of Computer Science
23 *  Carnegie Mellon University
24 *  Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30#include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
31
32__KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.44 2021/06/25 13:41:33 thorpej Exp $");
33
34#include <sys/types.h>
35#include <sys/param.h>
36#include <sys/time.h>
37#include <sys/systm.h>
38#include <sys/errno.h>
39#include <sys/device.h>
40
41#include <machine/autoconf.h>
42#include <machine/rpb.h>
43#include <sys/bus.h>
44#include <machine/intr.h>
45
46#include <dev/isa/isavar.h>
47#include <dev/pci/pcireg.h>
48#include <dev/pci/pcivar.h>
49
50#include <alpha/pci/apecsvar.h>
51
52#include <alpha/pci/siovar.h>
53#include <alpha/pci/sioreg.h>
54
55#include "sio.h"
56
57static int	dec_2100_a50_intr_map(const struct pci_attach_args *,
58		    pci_intr_handle_t *);
59
60static void
61pci_2100_a50_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt,
62    pci_chipset_tag_t pc)
63{
64
65	pc->pc_intr_v = core;
66	pc->pc_intr_map = dec_2100_a50_intr_map;
67	pc->pc_intr_string = sio_pci_intr_string;
68	pc->pc_intr_evcnt = sio_pci_intr_evcnt;
69	pc->pc_intr_establish = sio_pci_intr_establish;
70	pc->pc_intr_disestablish = sio_pci_intr_disestablish;
71
72	/* Not supported on 2100 A50. */
73	pc->pc_pciide_compat_intr_establish = NULL;
74
75#if NSIO
76	sio_intr_setup(pc, iot);
77#else
78	panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
79#endif
80}
81ALPHA_PCI_INTR_INIT(ST_DEC_2100_A50, pci_2100_a50_pickintr)
82
83int
84dec_2100_a50_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
85{
86	pcitag_t bustag = pa->pa_intrtag;
87	int buspin = pa->pa_intrpin;
88	pci_chipset_tag_t pc = pa->pa_pc;
89	int device, pirq;
90
91#ifndef DIAGNOSTIC
92	pirq = 0;				/* XXX gcc -Wuninitialized */
93#endif
94
95	if (buspin == 0) {
96		/* No IRQ used. */
97		return 1;
98	}
99	if (buspin < 0 || buspin > 4) {
100		printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
101		    buspin);
102		return 1;
103	}
104
105	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
106
107	switch (device) {
108	case 6:					/* NCR SCSI */
109		pirq = 3;
110		break;
111
112	case 11:				/* slot 1 */
113	case 14:				/* slot 3 */
114		switch (buspin) {
115		case PCI_INTERRUPT_PIN_A:
116		case PCI_INTERRUPT_PIN_D:
117			pirq = 0;
118			break;
119		case PCI_INTERRUPT_PIN_B:
120			pirq = 2;
121			break;
122		case PCI_INTERRUPT_PIN_C:
123			pirq = 1;
124			break;
125#ifdef DIAGNOSTIC
126		default:			/* XXX gcc -Wuninitialized */
127			panic("dec_2100_a50_intr_map bogus PCI pin %d",
128			    buspin);
129#endif
130		};
131		break;
132
133	case 12:				/* slot 2 */
134		switch (buspin) {
135		case PCI_INTERRUPT_PIN_A:
136		case PCI_INTERRUPT_PIN_D:
137			pirq = 1;
138			break;
139		case PCI_INTERRUPT_PIN_B:
140			pirq = 0;
141			break;
142		case PCI_INTERRUPT_PIN_C:
143			pirq = 2;
144			break;
145#ifdef DIAGNOSTIC
146		default:			/* XXX gcc -Wuninitialized */
147			panic("dec_2100_a50_intr_map bogus PCI pin %d",
148			    buspin);
149#endif
150		};
151		break;
152
153	case 13:				/* slot 3 */
154		switch (buspin) {
155		case PCI_INTERRUPT_PIN_A:
156		case PCI_INTERRUPT_PIN_D:
157			pirq = 2;
158			break;
159		case PCI_INTERRUPT_PIN_B:
160			pirq = 1;
161			break;
162		case PCI_INTERRUPT_PIN_C:
163			pirq = 0;
164			break;
165#ifdef DIAGNOSTIC
166		default:			/* XXX gcc -Wuninitialized */
167			panic("dec_2100_a50_intr_map bogus PCI pin %d",
168			    buspin);
169#endif
170		};
171		break;
172
173	default:
174	        printf("dec_2100_a50_intr_map: weird device number %d\n",
175		    device);
176	        return 1;
177	}
178
179#if 0
180	printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d\n",
181		device, '@' + buspin, pirq);
182#endif
183
184	return sio_pirq_intr_map(pc, pirq, ihp);
185}
186