intr.h revision 1.53
1/* $NetBSD: intr.h,v 1.53 2005/12/11 12:16:16 christos Exp $ */ 2 3/*- 4 * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 41 * Copyright (c) 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67#ifndef _ALPHA_INTR_H_ 68#define _ALPHA_INTR_H_ 69 70#include <sys/device.h> 71#include <sys/lock.h> 72#include <sys/queue.h> 73#include <machine/atomic.h> 74 75/* 76 * The Alpha System Control Block. This is 8k long, and you get 77 * 16 bytes per vector (i.e. the vector numbers are spaced 16 78 * apart). 79 * 80 * This is sort of a "shadow" SCB -- rather than the CPU jumping 81 * to (SCBaddr + (16 * vector)), like it does on the VAX, we get 82 * a vector number in a1. We use the SCB to look up a routine/arg 83 * and jump to it. 84 * 85 * Since we use the SCB only for I/O interrupts, we make it shorter 86 * than normal, starting it at vector 0x800 (the start of the I/O 87 * interrupt vectors). 88 */ 89#define SCB_IOVECBASE 0x0800 90#define SCB_VECSIZE 0x0010 91#define SCB_SIZE 0x2000 92 93#define SCB_VECTOIDX(x) ((x) >> 4) 94#define SCB_IDXTOVEC(x) ((x) << 4) 95 96#define SCB_NIOVECS SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE) 97 98struct scbvec { 99 void (*scb_func)(void *, u_long); 100 void *scb_arg; 101}; 102 103/* 104 * Alpha interrupts come in at one of 4 levels: 105 * 106 * software interrupt level 107 * i/o level 1 108 * i/o level 2 109 * clock level 110 * 111 * However, since we do not have any way to know which hardware 112 * level a particular i/o interrupt comes in on, we have to 113 * whittle it down to 3. 114 */ 115 116#define IPL_NONE ALPHA_PSL_IPL_0 /* no interrupt level */ 117#define IPL_SOFT ALPHA_PSL_IPL_SOFT /* generic software interrupts */ 118#define IPL_SOFTCLOCK IPL_SOFT /* clock software interrupts */ 119#define IPL_SOFTNET IPL_SOFT /* network software interrupts */ 120#define IPL_SOFTSERIAL IPL_SOFT /* serial software interrupts */ 121#define IPL_BIO ALPHA_PSL_IPL_IO /* block I/O interrupts */ 122#define IPL_NET ALPHA_PSL_IPL_IO /* network interrupts */ 123#define IPL_TTY ALPHA_PSL_IPL_IO /* terminal interrupts */ 124#define IPL_LPT IPL_TTY 125#define IPL_VM ALPHA_PSL_IPL_IO /* interrupts that can alloc mem */ 126#define IPL_CLOCK ALPHA_PSL_IPL_CLOCK/* clock interrupts */ 127#define IPL_STATCLOCK IPL_CLOCK 128#define IPL_HIGH ALPHA_PSL_IPL_HIGH /* all interrupts */ 129#define IPL_SERIAL ALPHA_PSL_IPL_IO /* serial interrupts */ 130 131#define IPL_SCHED IPL_HIGH 132#define IPL_LOCK IPL_HIGH 133#define IPL_IPI IPL_CLOCK /* AARM, 5-2, II-B */ 134 135#define SI_SOFTSERIAL 0 136#define SI_SOFTNET 1 137#define SI_SOFTCLOCK 2 138#define SI_SOFT 3 139 140#define SI_NQUEUES 4 141 142#define SI_QUEUENAMES { \ 143 "serial", \ 144 "net", \ 145 "clock", \ 146 "misc", \ 147} 148 149#define IST_UNUSABLE -1 /* interrupt cannot be used */ 150#define IST_NONE 0 /* none (dummy) */ 151#define IST_PULSE 1 /* pulsed */ 152#define IST_EDGE 2 /* edge-triggered */ 153#define IST_LEVEL 3 /* level-triggered */ 154 155#ifdef _KERNEL 156 157/* Simulated software interrupt register. */ 158extern __volatile unsigned long ssir; 159 160/* IPL-lowering/restoring macros */ 161void spl0(void); 162 163static __inline void 164splx(int s) 165{ 166 if (s == ALPHA_PSL_IPL_0 && ssir != 0) 167 spl0(); 168 else 169 alpha_pal_swpipl(s); 170} 171#define spllowersoftclock() ((void)alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)) 172 173/* IPL-raising functions/macros */ 174static __inline int 175_splraise(int s) 176{ 177 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 178 return (s > cur ? alpha_pal_swpipl(s) : cur); 179} 180 181#define splraiseipl(ipl) _splraise((ipl)) 182 183#include <sys/spl.h> 184 185/* 186 * Interprocessor interrupts. In order how we want them processed. 187 */ 188#define ALPHA_IPI_HALT (1UL << 0) 189#define ALPHA_IPI_MICROSET (1UL << 1) 190#define ALPHA_IPI_SHOOTDOWN (1UL << 2) 191#define ALPHA_IPI_IMB (1UL << 3) 192#define ALPHA_IPI_AST (1UL << 4) 193#define ALPHA_IPI_SYNCH_FPU (1UL << 5) 194#define ALPHA_IPI_DISCARD_FPU (1UL << 6) 195#define ALPHA_IPI_PAUSE (1UL << 7) 196#define ALPHA_IPI_PMAP_REACTIVATE (1UL << 8) 197 198#define ALPHA_NIPIS 9 /* must not exceed 64 */ 199 200struct cpu_info; 201struct trapframe; 202 203void alpha_ipi_init(struct cpu_info *); 204void alpha_ipi_process(struct cpu_info *, struct trapframe *); 205void alpha_send_ipi(unsigned long, unsigned long); 206void alpha_broadcast_ipi(unsigned long); 207void alpha_multicast_ipi(unsigned long, unsigned long); 208 209/* 210 * Alpha shared-interrupt-line common code. 211 */ 212 213struct alpha_shared_intrhand { 214 TAILQ_ENTRY(alpha_shared_intrhand) 215 ih_q; 216 struct alpha_shared_intr *ih_intrhead; 217 int (*ih_fn)(void *); 218 void *ih_arg; 219 int ih_level; 220 unsigned int ih_num; 221}; 222 223struct alpha_shared_intr { 224 TAILQ_HEAD(,alpha_shared_intrhand) 225 intr_q; 226 struct evcnt intr_evcnt; 227 char *intr_string; 228 void *intr_private; 229 int intr_sharetype; 230 int intr_dfltsharetype; 231 int intr_nstrays; 232 int intr_maxstrays; 233}; 234 235#define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 236 ((asi)[num].intr_maxstrays != 0 && \ 237 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 238 239#define setsoft(x) atomic_setbits_ulong(&ssir, 1 << (x)) 240 241struct alpha_soft_intrhand { 242 TAILQ_ENTRY(alpha_soft_intrhand) 243 sih_q; 244 struct alpha_soft_intr *sih_intrhead; 245 void (*sih_fn)(void *); 246 void *sih_arg; 247 int sih_pending; 248}; 249 250struct alpha_soft_intr { 251 TAILQ_HEAD(, alpha_soft_intrhand) 252 softintr_q; 253 struct evcnt softintr_evcnt; 254 struct simplelock softintr_slock; 255 unsigned long softintr_siq; 256}; 257 258void *softintr_establish(int, void (*)(void *), void *); 259void softintr_disestablish(void *); 260void softintr_init(void); 261void softintr_dispatch(void); 262 263#define softintr_schedule(arg) \ 264do { \ 265 struct alpha_soft_intrhand *__sih = (arg); \ 266 struct alpha_soft_intr *__si = __sih->sih_intrhead; \ 267 int __s; \ 268 \ 269 __s = splhigh(); \ 270 simple_lock(&__si->softintr_slock); \ 271 if (__sih->sih_pending == 0) { \ 272 TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q); \ 273 __sih->sih_pending = 1; \ 274 setsoft(__si->softintr_siq); \ 275 } \ 276 simple_unlock(&__si->softintr_slock); \ 277 splx(__s); \ 278} while (0) 279 280/* XXX For legacy software interrupts. */ 281extern struct alpha_soft_intrhand *softnet_intrhand; 282 283#define setsoftnet() softintr_schedule(softnet_intrhand) 284 285struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int); 286int alpha_shared_intr_dispatch(struct alpha_shared_intr *, 287 unsigned int); 288void *alpha_shared_intr_establish(struct alpha_shared_intr *, 289 unsigned int, int, int, int (*)(void *), void *, const char *); 290void alpha_shared_intr_disestablish(struct alpha_shared_intr *, 291 void *, const char *); 292int alpha_shared_intr_get_sharetype(struct alpha_shared_intr *, 293 unsigned int); 294int alpha_shared_intr_isactive(struct alpha_shared_intr *, 295 unsigned int); 296int alpha_shared_intr_firstactive(struct alpha_shared_intr *, 297 unsigned int); 298void alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *, 299 unsigned int, int); 300void alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *, 301 unsigned int, int); 302void alpha_shared_intr_reset_strays(struct alpha_shared_intr *, 303 unsigned int); 304void alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int, 305 const char *); 306void alpha_shared_intr_set_private(struct alpha_shared_intr *, 307 unsigned int, void *); 308void *alpha_shared_intr_get_private(struct alpha_shared_intr *, 309 unsigned int); 310char *alpha_shared_intr_string(struct alpha_shared_intr *, 311 unsigned int); 312struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *, 313 unsigned int); 314 315extern struct scbvec scb_iovectab[]; 316 317void scb_init(void); 318void scb_set(u_long, void (*)(void *, u_long), void *); 319u_long scb_alloc(void (*)(void *, u_long), void *); 320void scb_free(u_long); 321 322#define SCB_ALLOC_FAILED ((u_long) -1) 323 324#endif /* _KERNEL */ 325#endif /* ! _ALPHA_INTR_H_ */ 326