intr.h revision 1.32
1/* $NetBSD: intr.h,v 1.32 2000/08/15 22:16:19 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *	This product includes software developed by the NetBSD
21 *	Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 *    contributors may be used to endorse or promote products derived
24 *    from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39/*
40 * Copyright (c) 1997 Christopher G. Demetriou.  All rights reserved.
41 * Copyright (c) 1996 Carnegie-Mellon University.
42 * All rights reserved.
43 *
44 * Author: Chris G. Demetriou
45 *
46 * Permission to use, copy, modify and distribute this software and
47 * its documentation is hereby granted, provided that both the copyright
48 * notice and this permission notice appear in all copies of the
49 * software, derivative works or modified versions, and any portions
50 * thereof, and that both notices appear in supporting documentation.
51 *
52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55 *
56 * Carnegie Mellon requests users of this software to return to
57 *
58 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
59 *  School of Computer Science
60 *  Carnegie Mellon University
61 *  Pittsburgh PA 15213-3890
62 *
63 * any improvements or extensions that they make and grant Carnegie the
64 * rights to redistribute these changes.
65 */
66
67#ifndef _ALPHA_INTR_H_
68#define _ALPHA_INTR_H_
69
70#include <sys/device.h>
71#include <sys/lock.h>
72#include <sys/queue.h>
73#include <machine/atomic.h>
74
75/*
76 * Alpha interrupts come in at one of 4 levels:
77 *
78 *	software interrupt level
79 *	i/o level 1
80 *	i/o level 2
81 *	clock level
82 *
83 * However, since we do not have any way to know which hardware
84 * level a particular i/o interrupt comes in on, we have to
85 * whittle it down to 3.
86 */
87
88#define	IPL_NONE	1	/* disable only this interrupt */
89#define	IPL_BIO		1	/* disable block I/O interrupts */
90#define	IPL_NET		1	/* disable network interrupts */
91#define	IPL_TTY		1	/* disable terminal interrupts */
92#define	IPL_CLOCK	2	/* disable clock interrupts */
93#define	IPL_HIGH	3	/* disable all interrupts */
94#define	IPL_SERIAL	1	/* disable serial interrupts */
95
96#define	IPL_SOFTSERIAL	0	/* serial software interrupts */
97#define	IPL_SOFTNET	1	/* network software interrupts */
98#define	IPL_SOFTCLOCK	2	/* clock software interrupts */
99#define	IPL_SOFT	3	/* other software interrupts */
100#define	IPL_NSOFT	4
101
102#define	IPL_SOFTNAMES {							\
103	"serial",							\
104	"net",								\
105	"clock",							\
106	"misc",								\
107}
108
109#define	IST_UNUSABLE	-1	/* interrupt cannot be used */
110#define	IST_NONE	0	/* none (dummy) */
111#define	IST_PULSE	1	/* pulsed */
112#define	IST_EDGE	2	/* edge-triggered */
113#define	IST_LEVEL	3	/* level-triggered */
114
115#ifdef	_KERNEL
116
117/* IPL-lowering/restoring macros */
118void	spl0(void);
119static __inline void
120splx(int s)
121{
122	if (s == ALPHA_PSL_IPL_0)
123		spl0();
124	else
125		alpha_pal_swpipl(s);
126}
127#define	spllowersoftclock()	((void)alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT))
128
129/* IPL-raising functions/macros */
130static __inline int
131_splraise(int s)
132{
133	int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
134	return (s > cur ? alpha_pal_swpipl(s) : cur);
135}
136#define splsoft()		_splraise(ALPHA_PSL_IPL_SOFT)
137#define splsoftserial()		splsoft()
138#define splsoftclock()		splsoft()
139#define splsoftnet()		splsoft()
140#define splnet()		_splraise(ALPHA_PSL_IPL_IO)
141#define splbio()		_splraise(ALPHA_PSL_IPL_IO)
142#define splimp()		_splraise(ALPHA_PSL_IPL_IO)
143#define spltty()		_splraise(ALPHA_PSL_IPL_IO)
144#define splserial()		_splraise(ALPHA_PSL_IPL_IO)
145#define splclock()		_splraise(ALPHA_PSL_IPL_CLOCK)
146#define splstatclock()		_splraise(ALPHA_PSL_IPL_CLOCK)
147#define splhigh()		_splraise(ALPHA_PSL_IPL_HIGH)
148
149#define spllpt()		spltty()
150
151/*
152 * Interprocessor interrupts.  In order how we want them processed.
153 */
154#define	ALPHA_IPI_HALT		0x0000000000000001UL
155#define	ALPHA_IPI_TBIA		0x0000000000000002UL
156#define	ALPHA_IPI_TBIAP		0x0000000000000004UL
157#define	ALPHA_IPI_SHOOTDOWN	0x0000000000000008UL
158#define	ALPHA_IPI_IMB		0x0000000000000010UL
159#define	ALPHA_IPI_AST		0x0000000000000020UL
160#define	ALPHA_IPI_SYNCH_FPU	0x0000000000000040UL
161#define	ALPHA_IPI_DISCARD_FPU	0x0000000000000080UL
162
163#define	ALPHA_NIPIS		8	/* must not exceed 64 */
164
165typedef void (*ipifunc_t)(void);
166extern	ipifunc_t ipifuncs[ALPHA_NIPIS];
167
168void	alpha_send_ipi(unsigned long, unsigned long);
169void	alpha_broadcast_ipi(unsigned long);
170void	alpha_multicast_ipi(unsigned long, unsigned long);
171
172/*
173 * Alpha shared-interrupt-line common code.
174 */
175
176struct alpha_shared_intrhand {
177	TAILQ_ENTRY(alpha_shared_intrhand)
178		ih_q;
179	struct alpha_shared_intr *ih_intrhead;
180	int	(*ih_fn)(void *);
181	void	*ih_arg;
182	int	ih_level;
183	unsigned int ih_num;
184};
185
186struct alpha_shared_intr {
187	TAILQ_HEAD(,alpha_shared_intrhand)
188		intr_q;
189	struct evcnt intr_evcnt;
190	char	*intr_string;
191	void	*intr_private;
192	int	intr_sharetype;
193	int	intr_dfltsharetype;
194	int	intr_nstrays;
195	int	intr_maxstrays;
196};
197
198#define	ALPHA_SHARED_INTR_DISABLE(asi, num)				\
199	((asi)[num].intr_maxstrays != 0 &&				\
200	 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)
201
202/*
203 * simulated software interrupt register
204 */
205extern u_int64_t ssir;
206
207#define	setsoft(x)	atomic_setbits_ulong(&ssir, 1 << (x))
208
209#define	__GENERIC_SOFT_INTERRUPTS
210struct alpha_soft_intrhand {
211	LIST_ENTRY(alpha_soft_intrhand)
212		sih_q;
213	struct alpha_soft_intr *sih_intrhead;
214	void	(*sih_fn)(void *);
215	void	*sih_arg;
216	int	sih_pending;
217};
218
219struct alpha_soft_intr {
220	LIST_HEAD(, alpha_soft_intrhand)
221		softintr_q;
222	struct evcnt softintr_evcnt;
223	struct simplelock softintr_slock;
224	unsigned long softintr_ipl;
225};
226
227void	*softintr_establish(int, void (*)(void *), void *);
228void	softintr_disestablish(void *);
229void	softintr_init(void);
230void	softintr_dispatch(void);
231
232#define	softintr_schedule(arg)						\
233do {									\
234	struct alpha_soft_intrhand *__sih = (arg);			\
235	__sih->sih_pending = 1;						\
236	setsoft(__sih->sih_intrhead->softintr_ipl);			\
237} while (0)
238
239/* XXX For legacy software interrupts. */
240extern struct alpha_soft_intrhand *softnet_intrhand;
241extern struct alpha_soft_intrhand *softclock_intrhand;
242
243#define	setsoftnet()	softintr_schedule(softnet_intrhand)
244#define	setsoftclock()	softintr_schedule(softclock_intrhand)
245
246struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int);
247int	alpha_shared_intr_dispatch(struct alpha_shared_intr *,
248	    unsigned int);
249void	*alpha_shared_intr_establish(struct alpha_shared_intr *,
250	    unsigned int, int, int, int (*)(void *), void *, const char *);
251void	alpha_shared_intr_disestablish(struct alpha_shared_intr *,
252	    void *, const char *);
253int	alpha_shared_intr_get_sharetype(struct alpha_shared_intr *,
254	    unsigned int);
255int	alpha_shared_intr_isactive(struct alpha_shared_intr *,
256	    unsigned int);
257void	alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *,
258	    unsigned int, int);
259void	alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *,
260	    unsigned int, int);
261void	alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int,
262	    const char *);
263void	alpha_shared_intr_set_private(struct alpha_shared_intr *,
264	    unsigned int, void *);
265void	*alpha_shared_intr_get_private(struct alpha_shared_intr *,
266	    unsigned int);
267char	*alpha_shared_intr_string(struct alpha_shared_intr *,
268	    unsigned int);
269struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *,
270	    unsigned int);
271
272void	set_iointr(void (*)(void *, unsigned long));
273
274#endif /* _KERNEL */
275#endif /* ! _ALPHA_INTR_H_ */
276