1dnl PowerPC-64 mpn_mul_2 and mpn_addmul_2. 2 3dnl Copyright 2013 Free Software Foundation, Inc. 4 5dnl This file is part of the GNU MP Library. 6dnl 7dnl The GNU MP Library is free software; you can redistribute it and/or modify 8dnl it under the terms of either: 9dnl 10dnl * the GNU Lesser General Public License as published by the Free 11dnl Software Foundation; either version 3 of the License, or (at your 12dnl option) any later version. 13dnl 14dnl or 15dnl 16dnl * the GNU General Public License as published by the Free Software 17dnl Foundation; either version 2 of the License, or (at your option) any 18dnl later version. 19dnl 20dnl or both in parallel, as here. 21dnl 22dnl The GNU MP Library is distributed in the hope that it will be useful, but 23dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 24dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25dnl for more details. 26dnl 27dnl You should have received copies of the GNU General Public License and the 28dnl GNU Lesser General Public License along with the GNU MP Library. If not, 29dnl see https://www.gnu.org/licenses/. 30 31include(`../config.m4') 32 33C cycles/limb cycles/limb 34C mul_2 addmul_2 35C POWER3/PPC630 ? ? 36C POWER4/PPC970 ? ? 37C POWER5 ? ? 38C POWER6 ? ? 39C POWER7-SMT4 3 3 40C POWER7-SMT2 ? ? 41C POWER7-SMT1 ? ? 42 43C INPUT PARAMETERS 44define(`rp', `r3') 45define(`up', `r4') 46define(`n', `r5') 47define(`vp', `r6') 48 49define(`cy0', `r10') 50ifdef(`EXTRA_REGISTER', 51` define(`cy1', EXTRA_REGISTER)', 52` define(`cy1', `r31')') 53 54ifdef(`OPERATION_mul_2',` 55 define(`AM', `') 56 define(`ADDX', `addc') 57 define(`func', `mpn_mul_2') 58') 59ifdef(`OPERATION_addmul_2',` 60 define(`AM', `$1') 61 define(`ADDX', `adde') 62 define(`func', `mpn_addmul_2') 63') 64 65MULFUNC_PROLOGUE(mpn_mul_2 mpn_addmul_2) 66 67ASM_START() 68PROLOGUE(func) 69 70ifdef(`EXTRA_REGISTER',,` 71 std r31, -8(r1) 72') 73 andi. r12, n, 1 74 addi r0, n, 1 75 srdi r0, r0, 1 76 mtctr r0 77 ld r11, 0(vp) C v0 78 li cy0, 0 79 ld r12, 8(vp) C v1 80 li cy1, 0 81 ld r5, 0(up) 82 beq L(lo0) 83 addi up, up, -8 84 addi rp, rp, -8 85 b L(lo1) 86 87 ALIGN(32) 88L(top): 89AM(` ld r0, -8(rp)') 90 ld r5, 0(up) 91AM(` addc r6, r6, r0') 92 ADDX r7, r7, r8 93 addze r9, r9 94 addc r6, r6, cy0 95 adde cy0, r7, cy1 96 std r6, -8(rp) 97 addze cy1, r9 98L(lo0): mulld r6, r11, r5 C v0 * u[i] weight 0 99 mulhdu r7, r11, r5 C v0 * u[i] weight 1 100 mulld r8, r12, r5 C v1 * u[i] weight 1 101 mulhdu r9, r12, r5 C v1 * u[i] weight 2 102AM(` ld r0, 0(rp)') 103 ld r5, 8(up) 104AM(` addc r6, r6, r0') 105 ADDX r7, r7, r8 106 addze r9, r9 107 addc r6, r6, cy0 108 adde cy0, r7, cy1 109 std r6, 0(rp) 110 addze cy1, r9 111L(lo1): mulld r6, r11, r5 C v0 * u[i] weight 0 112 mulhdu r7, r11, r5 C v0 * u[i] weight 1 113 addi up, up, 16 114 addi rp, rp, 16 115 mulld r8, r12, r5 C v1 * u[i] weight 1 116 mulhdu r9, r12, r5 C v1 * u[i] weight 2 117 bdnz L(top) 118 119L(end): 120AM(` ld r0, -8(rp)') 121AM(` addc r6, r6, r0') 122 ADDX r7, r7, r8 123 addze r9, r9 124 addc r6, r6, cy0 125 std r6, -8(rp) 126 adde cy0, r7, cy1 127 addze cy1, r9 128 std cy0, 0(rp) 129 mr r3, cy1 130 131ifdef(`EXTRA_REGISTER',,` 132 ld r31, -8(r1) 133') 134 blr 135EPILOGUE() 136