1# Blackfin testcase for HW Loops and user->super transitions 2# mach: bfin 3# sim: --environment operating 4 5#include "test.h" 6 .include "testutils.inc" 7 8 .macro check_hwloop_regs lc:req, lt:req, lb:req 9 R0 = LC0; 10 CC = R0 == \lc; 11 IF !CC JUMP fail; 12 13 R0 = LT0; 14 CC = R0 == \lt; 15 IF !CC JUMP fail; 16 17 R0 = LB0; 18 CC = R0 == \lb; 19 IF !CC JUMP fail; 20 21 R0 = LC1; 22 CC = R0 == \lc; 23 IF !CC JUMP fail; 24 25 R0 = LT1; 26 CC = R0 == \lt; 27 IF !CC JUMP fail; 28 29 R0 = LB1; 30 CC = R0 == \lb; 31 IF !CC JUMP fail; 32 .endm 33 34 start 35 36 imm32 P0, EVT3; 37 loadsym R0, exception; 38 [P0] = R0; 39 40 imm32 P0, EVT2; 41 loadsym R0, nmi; 42 [P0] = R0; 43 44 loadsym R0, usermode; 45 RETI = R0; 46 47 # Set the LC/LB/LT up with LSB set 48 # - Hardware clears LT LSB, but LB remains until we lower 49 imm32 R6, 0xaaaa5555 50 R4 = R6; 51 BITCLR (R4, 0); 52 imm32 R7, 0xaa55aa55 53 R5 = R7; 54 BITCLR (R5, 0); 55 56 LC0 = R6; 57 LT0 = R6; 58 LB0 = R7; 59 LC1 = R6; 60 LT1 = R6; 61 LB1 = R7; 62 63 # Sanity check 64 check_hwloop_regs R6, R4, R7 65 66 RTI; 67 68usermode: 69 # Make sure LSB has been cleared in LB 70 check_hwloop_regs R6, R4, R5 71 72 # Clear LSB in all LC/LT/LB 73 LC0 = R4; 74 LT0 = R4; 75 LB0 = R5; 76 LC1 = R4; 77 LT1 = R4; 78 LB1 = R5; 79 80 # Now move back up to supervisor 81 EXCPT 4; 82 83exception: 84 # Make sure LSB is set in LB 85 check_hwloop_regs R4, R4, R7 86 87 # Clear the LSB and move up another supervisor level 88 LC0 = R4; 89 LT0 = R4; 90 LB0 = R5; 91 LC1 = R4; 92 LT1 = R4; 93 LB1 = R5; 94 95 RAISE 2; 96 97nmi: 98 # Make sure LSB stayed clear 99 check_hwloop_regs R4, R4, R5 100 101 dbg_pass 102 103fail: 104 dbg_fail 105