1# Intel(r) Wireless MMX(tm) technology testcase for WUNPCKEL
2# mach: xscale
3# as: -mcpu=xscale+iwmmxt
4
5	.include "testutils.inc"
6
7	start
8
9	.global wunpckel
10wunpckel:
11	# Enable access to CoProcessors 0 & 1 before
12        # we attempt these instructions.
13
14	mvi_h_gr   r1, 3
15	mcr        p15, 0, r1, cr15, cr1, 0
16
17	# Test Unsigned Byte Unpacking
18		
19	mvi_h_gr   r0, 0x12345687
20	mvi_h_gr   r1, 0x9abcdef0
21	mvi_h_gr   r2, 0
22	mvi_h_gr   r3, 0
23
24	tmcrr	   wr0, r0, r1
25	tmcrr	   wr1, r2, r3
26
27	wunpckelub  wr1, wr0
28	
29	tmrrc	   r0, r1, wr0
30	tmrrc	   r2, r3, wr1
31	
32	test_h_gr  r0, 0x12345687
33	test_h_gr  r1, 0x9abcdef0
34	test_h_gr  r2, 0x00560087
35	test_h_gr  r3, 0x00120034
36		
37	# Test Signed Byte Unpacking
38		
39	mvi_h_gr   r0, 0x12345687
40	mvi_h_gr   r1, 0x9abcdef0
41	mvi_h_gr   r2, 0
42	mvi_h_gr   r3, 0
43
44	tmcrr	   wr0, r0, r1
45	tmcrr	   wr1, r2, r3
46
47	wunpckelsb  wr1, wr0
48	
49	tmrrc	   r0, r1, wr0
50	tmrrc	   r2, r3, wr1
51	
52	test_h_gr  r0, 0x12345687
53	test_h_gr  r1, 0x9abcdef0
54	test_h_gr  r2, 0x0056ff87
55	test_h_gr  r3, 0x00120034
56		
57	# Test Unsigned Halfword Unpacking
58		
59	mvi_h_gr   r0, 0x12345678
60	mvi_h_gr   r1, 0x9abcdef0
61	mvi_h_gr   r2, 0
62	mvi_h_gr   r3, 0
63
64	tmcrr	   wr0, r0, r1
65	tmcrr	   wr1, r2, r3
66
67	wunpckeluh  wr1, wr0
68	
69	tmrrc	   r0, r1, wr0
70	tmrrc	   r2, r3, wr1
71	
72	test_h_gr  r0, 0x12345678
73	test_h_gr  r1, 0x9abcdef0
74	test_h_gr  r2, 0x00005678
75	test_h_gr  r3, 0x00001234
76		
77	# Test Signed Halfword Unpacking
78		
79	mvi_h_gr   r0, 0x12348678
80	mvi_h_gr   r1, 0x9abcdef0
81	mvi_h_gr   r2, 0
82	mvi_h_gr   r3, 0
83
84	tmcrr	   wr0, r0, r1
85	tmcrr	   wr1, r2, r3
86
87	wunpckelsh  wr1, wr0
88	
89	tmrrc	   r0, r1, wr0
90	tmrrc	   r2, r3, wr1
91	
92	test_h_gr  r0, 0x12348678
93	test_h_gr  r1, 0x9abcdef0
94	test_h_gr  r2, 0xffff8678
95	test_h_gr  r3, 0x00001234
96		
97	# Test Unsigned Word Unpacking
98		
99	mvi_h_gr   r0, 0x12345678
100	mvi_h_gr   r1, 0x9abcdef0
101	mvi_h_gr   r2, 0
102	mvi_h_gr   r3, 0
103
104	tmcrr	   wr0, r0, r1
105	tmcrr	   wr1, r2, r3
106
107	wunpckeluw  wr1, wr0
108	
109	tmrrc	   r0, r1, wr0
110	tmrrc	   r2, r3, wr1
111	
112	test_h_gr  r0, 0x12345678
113	test_h_gr  r1, 0x9abcdef0
114	test_h_gr  r2, 0x12345678
115	test_h_gr  r3, 0x00000000
116		
117	# Test Signed Word Unpacking
118		
119	mvi_h_gr   r0, 0x82345678
120	mvi_h_gr   r1, 0x9abcdef0
121	mvi_h_gr   r2, 0
122	mvi_h_gr   r3, 0
123
124	tmcrr	   wr0, r0, r1
125	tmcrr	   wr1, r2, r3
126
127	wunpckelsw  wr1, wr0
128	
129	tmrrc	   r0, r1, wr0
130	tmrrc	   r2, r3, wr1
131	
132	test_h_gr  r0, 0x82345678
133	test_h_gr  r1, 0x9abcdef0
134	test_h_gr  r2, 0x82345678
135	test_h_gr  r3, 0xffffffff
136		
137	pass
138