1/* Select disassembly routine for specified architecture. 2 Copyright (C) 1994-2022 Free Software Foundation, Inc. 3 4 This file is part of the GNU opcodes library. 5 6 This library is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21#include "sysdep.h" 22#include "disassemble.h" 23#include "safe-ctype.h" 24#include "opintl.h" 25 26#ifdef ARCH_all 27#ifdef BFD64 28#define ARCH_aarch64 29#define ARCH_alpha 30#define ARCH_bpf 31#define ARCH_ia64 32#define ARCH_loongarch 33#define ARCH_mips 34#define ARCH_mmix 35#define ARCH_nfp 36#define ARCH_riscv 37#define ARCH_score 38#define ARCH_tilegx 39#endif 40#define ARCH_arc 41#define ARCH_arm 42#define ARCH_avr 43#define ARCH_bfin 44#define ARCH_cr16 45#define ARCH_cris 46#define ARCH_crx 47#define ARCH_csky 48#define ARCH_d10v 49#define ARCH_d30v 50#define ARCH_dlx 51#define ARCH_epiphany 52#define ARCH_fr30 53#define ARCH_frv 54#define ARCH_ft32 55#define ARCH_h8300 56#define ARCH_hppa 57#define ARCH_i386 58#define ARCH_ip2k 59#define ARCH_iq2000 60#define ARCH_lm32 61#define ARCH_m32c 62#define ARCH_m32r 63#define ARCH_m68hc11 64#define ARCH_m68hc12 65#define ARCH_m68k 66#define ARCH_mcore 67#define ARCH_mep 68#define ARCH_metag 69#define ARCH_microblaze 70#define ARCH_mn10200 71#define ARCH_mn10300 72#define ARCH_moxie 73#define ARCH_mt 74#define ARCH_msp430 75#define ARCH_nds32 76#define ARCH_nios2 77#define ARCH_ns32k 78#define ARCH_or1k 79#define ARCH_pdp11 80#define ARCH_pj 81#define ARCH_powerpc 82#define ARCH_pru 83#define ARCH_rs6000 84#define ARCH_rl78 85#define ARCH_rx 86#define ARCH_s12z 87#define ARCH_s390 88#define ARCH_sh 89#define ARCH_sparc 90#define ARCH_spu 91#define ARCH_tic30 92#define ARCH_tic4x 93#define ARCH_tic54x 94#define ARCH_tic6x 95#define ARCH_tilepro 96#define ARCH_v850 97#define ARCH_vax 98#define ARCH_visium 99#define ARCH_wasm32 100#define ARCH_xstormy16 101#define ARCH_xgate 102#define ARCH_xtensa 103#define ARCH_z80 104#define ARCH_z8k 105#endif 106 107#ifdef ARCH_m32c 108#include "m32c-desc.h" 109#endif 110 111#ifdef ARCH_bpf 112/* XXX this should be including bpf-desc.h instead of this hackery, 113 but at the moment it is not possible to include several CGEN 114 generated *-desc.h files simultaneously. To be fixed in 115 CGEN... */ 116 117# ifdef ARCH_m32c 118enum epbf_isa_attr 119{ 120 ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE, ISA_EBPFMAX 121}; 122# else 123# include "bpf-desc.h" 124# define ISA_EBPFMAX ISA_MAX 125# endif 126#endif /* ARCH_bpf */ 127 128disassembler_ftype 129disassembler (enum bfd_architecture a, 130 bool big ATTRIBUTE_UNUSED, 131 unsigned long mach ATTRIBUTE_UNUSED, 132 bfd *abfd ATTRIBUTE_UNUSED) 133{ 134 disassembler_ftype disassemble; 135 136 switch (a) 137 { 138 /* If you add a case to this table, also add it to the 139 ARCH_all definition right above this function. */ 140#ifdef ARCH_aarch64 141 case bfd_arch_aarch64: 142 disassemble = print_insn_aarch64; 143 break; 144#endif 145#ifdef ARCH_alpha 146 case bfd_arch_alpha: 147 disassemble = print_insn_alpha; 148 break; 149#endif 150#ifdef ARCH_arc 151 case bfd_arch_arc: 152 disassemble = arc_get_disassembler (abfd); 153 break; 154#endif 155#ifdef ARCH_arm 156 case bfd_arch_arm: 157 if (big) 158 disassemble = print_insn_big_arm; 159 else 160 disassemble = print_insn_little_arm; 161 break; 162#endif 163#ifdef ARCH_avr 164 case bfd_arch_avr: 165 disassemble = print_insn_avr; 166 break; 167#endif 168#ifdef ARCH_bfin 169 case bfd_arch_bfin: 170 disassemble = print_insn_bfin; 171 break; 172#endif 173#ifdef ARCH_cr16 174 case bfd_arch_cr16: 175 disassemble = print_insn_cr16; 176 break; 177#endif 178#ifdef ARCH_cris 179 case bfd_arch_cris: 180 disassemble = cris_get_disassembler (abfd); 181 break; 182#endif 183#ifdef ARCH_crx 184 case bfd_arch_crx: 185 disassemble = print_insn_crx; 186 break; 187#endif 188#ifdef ARCH_csky 189 case bfd_arch_csky: 190 disassemble = csky_get_disassembler (abfd); 191 break; 192#endif 193 194#ifdef ARCH_d10v 195 case bfd_arch_d10v: 196 disassemble = print_insn_d10v; 197 break; 198#endif 199#ifdef ARCH_d30v 200 case bfd_arch_d30v: 201 disassemble = print_insn_d30v; 202 break; 203#endif 204#ifdef ARCH_dlx 205 case bfd_arch_dlx: 206 /* As far as I know we only handle big-endian DLX objects. */ 207 disassemble = print_insn_dlx; 208 break; 209#endif 210#ifdef ARCH_h8300 211 case bfd_arch_h8300: 212 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn) 213 disassemble = print_insn_h8300h; 214 else if (mach == bfd_mach_h8300s 215 || mach == bfd_mach_h8300sn 216 || mach == bfd_mach_h8300sx 217 || mach == bfd_mach_h8300sxn) 218 disassemble = print_insn_h8300s; 219 else 220 disassemble = print_insn_h8300; 221 break; 222#endif 223#ifdef ARCH_hppa 224 case bfd_arch_hppa: 225 disassemble = print_insn_hppa; 226 break; 227#endif 228#ifdef ARCH_i386 229 case bfd_arch_i386: 230 case bfd_arch_iamcu: 231 disassemble = print_insn_i386; 232 break; 233#endif 234#ifdef ARCH_ia64 235 case bfd_arch_ia64: 236 disassemble = print_insn_ia64; 237 break; 238#endif 239#ifdef ARCH_ip2k 240 case bfd_arch_ip2k: 241 disassemble = print_insn_ip2k; 242 break; 243#endif 244#ifdef ARCH_bpf 245 case bfd_arch_bpf: 246 disassemble = print_insn_bpf; 247 break; 248#endif 249#ifdef ARCH_epiphany 250 case bfd_arch_epiphany: 251 disassemble = print_insn_epiphany; 252 break; 253#endif 254#ifdef ARCH_fr30 255 case bfd_arch_fr30: 256 disassemble = print_insn_fr30; 257 break; 258#endif 259#ifdef ARCH_lm32 260 case bfd_arch_lm32: 261 disassemble = print_insn_lm32; 262 break; 263#endif 264#ifdef ARCH_m32r 265 case bfd_arch_m32r: 266 disassemble = print_insn_m32r; 267 break; 268#endif 269#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \ 270 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg) 271 case bfd_arch_m68hc11: 272 disassemble = print_insn_m68hc11; 273 break; 274 case bfd_arch_m68hc12: 275 disassemble = print_insn_m68hc12; 276 break; 277 case bfd_arch_m9s12x: 278 disassemble = print_insn_m9s12x; 279 break; 280 case bfd_arch_m9s12xg: 281 disassemble = print_insn_m9s12xg; 282 break; 283#endif 284#if defined(ARCH_s12z) 285 case bfd_arch_s12z: 286 disassemble = print_insn_s12z; 287 break; 288#endif 289#ifdef ARCH_m68k 290 case bfd_arch_m68k: 291 disassemble = print_insn_m68k; 292 break; 293#endif 294#ifdef ARCH_mt 295 case bfd_arch_mt: 296 disassemble = print_insn_mt; 297 break; 298#endif 299#ifdef ARCH_microblaze 300 case bfd_arch_microblaze: 301 disassemble = print_insn_microblaze; 302 break; 303#endif 304#ifdef ARCH_msp430 305 case bfd_arch_msp430: 306 disassemble = print_insn_msp430; 307 break; 308#endif 309#ifdef ARCH_nds32 310 case bfd_arch_nds32: 311 disassemble = print_insn_nds32; 312 break; 313#endif 314#ifdef ARCH_nfp 315 case bfd_arch_nfp: 316 disassemble = print_insn_nfp; 317 break; 318#endif 319#ifdef ARCH_ns32k 320 case bfd_arch_ns32k: 321 disassemble = print_insn_ns32k; 322 break; 323#endif 324#ifdef ARCH_mcore 325 case bfd_arch_mcore: 326 disassemble = print_insn_mcore; 327 break; 328#endif 329#ifdef ARCH_mep 330 case bfd_arch_mep: 331 disassemble = print_insn_mep; 332 break; 333#endif 334#ifdef ARCH_metag 335 case bfd_arch_metag: 336 disassemble = print_insn_metag; 337 break; 338#endif 339#ifdef ARCH_mips 340 case bfd_arch_mips: 341 if (big) 342 disassemble = print_insn_big_mips; 343 else 344 disassemble = print_insn_little_mips; 345 break; 346#endif 347#ifdef ARCH_mmix 348 case bfd_arch_mmix: 349 disassemble = print_insn_mmix; 350 break; 351#endif 352#ifdef ARCH_mn10200 353 case bfd_arch_mn10200: 354 disassemble = print_insn_mn10200; 355 break; 356#endif 357#ifdef ARCH_mn10300 358 case bfd_arch_mn10300: 359 disassemble = print_insn_mn10300; 360 break; 361#endif 362#ifdef ARCH_nios2 363 case bfd_arch_nios2: 364 if (big) 365 disassemble = print_insn_big_nios2; 366 else 367 disassemble = print_insn_little_nios2; 368 break; 369#endif 370#ifdef ARCH_or1k 371 case bfd_arch_or1k: 372 disassemble = print_insn_or1k; 373 break; 374#endif 375#ifdef ARCH_pdp11 376 case bfd_arch_pdp11: 377 disassemble = print_insn_pdp11; 378 break; 379#endif 380#ifdef ARCH_pj 381 case bfd_arch_pj: 382 disassemble = print_insn_pj; 383 break; 384#endif 385#ifdef ARCH_powerpc 386 case bfd_arch_powerpc: 387#endif 388#ifdef ARCH_rs6000 389 case bfd_arch_rs6000: 390#endif 391#if defined ARCH_powerpc || defined ARCH_rs6000 392 if (big) 393 disassemble = print_insn_big_powerpc; 394 else 395 disassemble = print_insn_little_powerpc; 396 break; 397#endif 398#ifdef ARCH_pru 399 case bfd_arch_pru: 400 disassemble = print_insn_pru; 401 break; 402#endif 403#ifdef ARCH_riscv 404 case bfd_arch_riscv: 405 disassemble = riscv_get_disassembler (abfd); 406 break; 407#endif 408#ifdef ARCH_rl78 409 case bfd_arch_rl78: 410 disassemble = rl78_get_disassembler (abfd); 411 break; 412#endif 413#ifdef ARCH_rx 414 case bfd_arch_rx: 415 disassemble = print_insn_rx; 416 break; 417#endif 418#ifdef ARCH_s390 419 case bfd_arch_s390: 420 disassemble = print_insn_s390; 421 break; 422#endif 423#ifdef ARCH_score 424 case bfd_arch_score: 425 if (big) 426 disassemble = print_insn_big_score; 427 else 428 disassemble = print_insn_little_score; 429 break; 430#endif 431#ifdef ARCH_sh 432 case bfd_arch_sh: 433 disassemble = print_insn_sh; 434 break; 435#endif 436#ifdef ARCH_sparc 437 case bfd_arch_sparc: 438 disassemble = print_insn_sparc; 439 break; 440#endif 441#ifdef ARCH_spu 442 case bfd_arch_spu: 443 disassemble = print_insn_spu; 444 break; 445#endif 446#ifdef ARCH_tic30 447 case bfd_arch_tic30: 448 disassemble = print_insn_tic30; 449 break; 450#endif 451#ifdef ARCH_tic4x 452 case bfd_arch_tic4x: 453 disassemble = print_insn_tic4x; 454 break; 455#endif 456#ifdef ARCH_tic54x 457 case bfd_arch_tic54x: 458 disassemble = print_insn_tic54x; 459 break; 460#endif 461#ifdef ARCH_tic6x 462 case bfd_arch_tic6x: 463 disassemble = print_insn_tic6x; 464 break; 465#endif 466#ifdef ARCH_ft32 467 case bfd_arch_ft32: 468 disassemble = print_insn_ft32; 469 break; 470#endif 471#ifdef ARCH_v850 472 case bfd_arch_v850: 473 case bfd_arch_v850_rh850: 474 disassemble = print_insn_v850; 475 break; 476#endif 477#ifdef ARCH_wasm32 478 case bfd_arch_wasm32: 479 disassemble = print_insn_wasm32; 480 break; 481#endif 482#ifdef ARCH_xgate 483 case bfd_arch_xgate: 484 disassemble = print_insn_xgate; 485 break; 486#endif 487#ifdef ARCH_xstormy16 488 case bfd_arch_xstormy16: 489 disassemble = print_insn_xstormy16; 490 break; 491#endif 492#ifdef ARCH_xtensa 493 case bfd_arch_xtensa: 494 disassemble = print_insn_xtensa; 495 break; 496#endif 497#ifdef ARCH_z80 498 case bfd_arch_z80: 499 disassemble = print_insn_z80; 500 break; 501#endif 502#ifdef ARCH_z8k 503 case bfd_arch_z8k: 504 if (mach == bfd_mach_z8001) 505 disassemble = print_insn_z8001; 506 else 507 disassemble = print_insn_z8002; 508 break; 509#endif 510#ifdef ARCH_vax 511 case bfd_arch_vax: 512 disassemble = print_insn_vax; 513 break; 514#endif 515#ifdef ARCH_visium 516 case bfd_arch_visium: 517 disassemble = print_insn_visium; 518 break; 519#endif 520#ifdef ARCH_frv 521 case bfd_arch_frv: 522 disassemble = print_insn_frv; 523 break; 524#endif 525#ifdef ARCH_moxie 526 case bfd_arch_moxie: 527 disassemble = print_insn_moxie; 528 break; 529#endif 530#ifdef ARCH_iq2000 531 case bfd_arch_iq2000: 532 disassemble = print_insn_iq2000; 533 break; 534#endif 535#ifdef ARCH_m32c 536 case bfd_arch_m32c: 537 disassemble = print_insn_m32c; 538 break; 539#endif 540#ifdef ARCH_tilegx 541 case bfd_arch_tilegx: 542 disassemble = print_insn_tilegx; 543 break; 544#endif 545#ifdef ARCH_tilepro 546 case bfd_arch_tilepro: 547 disassemble = print_insn_tilepro; 548 break; 549#endif 550#ifdef ARCH_loongarch 551 case bfd_arch_loongarch: 552 disassemble = print_insn_loongarch; 553 break; 554#endif 555 default: 556 return 0; 557 } 558 return disassemble; 559} 560 561void 562disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) 563{ 564#ifdef ARCH_aarch64 565 print_aarch64_disassembler_options (stream); 566#endif 567#ifdef ARCH_arc 568 print_arc_disassembler_options (stream); 569#endif 570#ifdef ARCH_arm 571 print_arm_disassembler_options (stream); 572#endif 573#ifdef ARCH_mips 574 print_mips_disassembler_options (stream); 575#endif 576#ifdef ARCH_nfp 577 print_nfp_disassembler_options (stream); 578#endif 579#ifdef ARCH_powerpc 580 print_ppc_disassembler_options (stream); 581#endif 582#ifdef ARCH_riscv 583 print_riscv_disassembler_options (stream); 584#endif 585#ifdef ARCH_i386 586 print_i386_disassembler_options (stream); 587#endif 588#ifdef ARCH_s390 589 print_s390_disassembler_options (stream); 590#endif 591#ifdef ARCH_wasm32 592 print_wasm32_disassembler_options (stream); 593#endif 594#ifdef ARCH_loongarch 595 print_loongarch_disassembler_options (stream); 596#endif 597 598 return; 599} 600 601void 602disassemble_init_for_target (struct disassemble_info * info) 603{ 604 if (info == NULL) 605 return; 606 607 switch (info->arch) 608 { 609#ifdef ARCH_aarch64 610 case bfd_arch_aarch64: 611 info->symbol_is_valid = aarch64_symbol_is_valid; 612 info->disassembler_needs_relocs = true; 613 info->created_styled_output = true; 614 break; 615#endif 616#ifdef ARCH_arc 617 case bfd_arch_arc: 618 info->created_styled_output = true; 619 break; 620#endif 621#ifdef ARCH_arm 622 case bfd_arch_arm: 623 info->symbol_is_valid = arm_symbol_is_valid; 624 info->disassembler_needs_relocs = true; 625 info->created_styled_output = true; 626 break; 627#endif 628#ifdef ARCH_avr 629 case bfd_arch_avr: 630 info->created_styled_output = true; 631 break; 632#endif 633#ifdef ARCH_csky 634 case bfd_arch_csky: 635 info->symbol_is_valid = csky_symbol_is_valid; 636 info->disassembler_needs_relocs = true; 637 break; 638#endif 639#ifdef ARCH_i386 640 case bfd_arch_i386: 641 case bfd_arch_iamcu: 642 info->created_styled_output = true; 643 break; 644#endif 645#ifdef ARCH_ia64 646 case bfd_arch_ia64: 647 info->skip_zeroes = 16; 648 break; 649#endif 650#ifdef ARCH_tic4x 651 case bfd_arch_tic4x: 652 info->skip_zeroes = 32; 653 break; 654#endif 655#ifdef ARCH_mep 656 case bfd_arch_mep: 657 info->skip_zeroes = 256; 658 info->skip_zeroes_at_end = 0; 659 break; 660#endif 661#ifdef ARCH_metag 662 case bfd_arch_metag: 663 info->disassembler_needs_relocs = true; 664 break; 665#endif 666#ifdef ARCH_mips 667 case bfd_arch_mips: 668 info->created_styled_output = true; 669 break; 670#endif 671#ifdef ARCH_m32c 672 case bfd_arch_m32c: 673 /* This processor in fact is little endian. The value set here 674 reflects the way opcodes are written in the cgen description. */ 675 info->endian = BFD_ENDIAN_BIG; 676 if (!info->private_data) 677 { 678 info->private_data = cgen_bitset_create (ISA_MAX); 679 if (info->mach == bfd_mach_m16c) 680 cgen_bitset_set (info->private_data, ISA_M16C); 681 else 682 cgen_bitset_set (info->private_data, ISA_M32C); 683 } 684 break; 685#endif 686#ifdef ARCH_bpf 687 case bfd_arch_bpf: 688 info->endian_code = BFD_ENDIAN_LITTLE; 689 if (!info->private_data) 690 { 691 info->private_data = cgen_bitset_create (ISA_MAX); 692 if (info->endian == BFD_ENDIAN_BIG) 693 { 694 cgen_bitset_set (info->private_data, ISA_EBPFBE); 695 if (info->mach == bfd_mach_xbpf) 696 cgen_bitset_set (info->private_data, ISA_XBPFBE); 697 } 698 else 699 { 700 cgen_bitset_set (info->private_data, ISA_EBPFLE); 701 if (info->mach == bfd_mach_xbpf) 702 cgen_bitset_set (info->private_data, ISA_XBPFLE); 703 } 704 } 705 break; 706#endif 707#ifdef ARCH_pru 708 case bfd_arch_pru: 709 info->disassembler_needs_relocs = true; 710 break; 711#endif 712#ifdef ARCH_powerpc 713 case bfd_arch_powerpc: 714#endif 715#ifdef ARCH_rs6000 716 case bfd_arch_rs6000: 717#endif 718#if defined (ARCH_powerpc) || defined (ARCH_rs6000) 719 disassemble_init_powerpc (info); 720 info->created_styled_output = true; 721 break; 722#endif 723#ifdef ARCH_riscv 724 case bfd_arch_riscv: 725 info->symbol_is_valid = riscv_symbol_is_valid; 726 info->created_styled_output = true; 727 break; 728#endif 729#ifdef ARCH_wasm32 730 case bfd_arch_wasm32: 731 disassemble_init_wasm32 (info); 732 break; 733#endif 734#ifdef ARCH_s390 735 case bfd_arch_s390: 736 disassemble_init_s390 (info); 737 info->created_styled_output = true; 738 break; 739#endif 740#ifdef ARCH_nds32 741 case bfd_arch_nds32: 742 disassemble_init_nds32 (info); 743 break; 744 #endif 745 default: 746 break; 747 } 748} 749 750void 751disassemble_free_target (struct disassemble_info *info) 752{ 753 if (info == NULL) 754 return; 755 756 switch (info->arch) 757 { 758 default: 759 return; 760 761#ifdef ARCH_bpf 762 case bfd_arch_bpf: 763#endif 764#ifdef ARCH_m32c 765 case bfd_arch_m32c: 766#endif 767#if defined ARCH_bpf || defined ARCH_m32c 768 if (info->private_data) 769 { 770 CGEN_BITSET *mask = info->private_data; 771 free (mask->bits); 772 } 773 break; 774#endif 775 776#ifdef ARCH_arc 777 case bfd_arch_arc: 778 break; 779#endif 780#ifdef ARCH_cris 781 case bfd_arch_cris: 782 break; 783#endif 784#ifdef ARCH_mmix 785 case bfd_arch_mmix: 786 break; 787#endif 788#ifdef ARCH_nfp 789 case bfd_arch_nfp: 790 break; 791#endif 792#ifdef ARCH_powerpc 793 case bfd_arch_powerpc: 794 break; 795#endif 796#ifdef ARCH_riscv 797 case bfd_arch_riscv: 798 break; 799#endif 800#ifdef ARCH_rs6000 801 case bfd_arch_rs6000: 802 break; 803#endif 804 } 805 806 free (info->private_data); 807} 808 809/* Remove whitespace and consecutive commas from OPTIONS. */ 810 811char * 812remove_whitespace_and_extra_commas (char *options) 813{ 814 char *str; 815 size_t i, len; 816 817 if (options == NULL) 818 return NULL; 819 820 /* Strip off all trailing whitespace and commas. */ 821 for (len = strlen (options); len > 0; len--) 822 { 823 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',') 824 break; 825 options[len - 1] = '\0'; 826 } 827 828 /* Convert all remaining whitespace to commas. */ 829 for (i = 0; options[i] != '\0'; i++) 830 if (ISSPACE (options[i])) 831 options[i] = ','; 832 833 /* Remove consecutive commas. */ 834 for (str = options; *str != '\0'; str++) 835 if (*str == ',' && (*(str + 1) == ',' || str == options)) 836 { 837 char *next = str + 1; 838 while (*next == ',') 839 next++; 840 len = strlen (next); 841 if (str != options) 842 str++; 843 memmove (str, next, len); 844 next[len - (size_t)(next - str)] = '\0'; 845 } 846 return (strlen (options) != 0) ? options : NULL; 847} 848 849/* Like STRCMP, but treat ',' the same as '\0' so that we match 850 strings like "foobar" against "foobar,xxyyzz,...". */ 851 852int 853disassembler_options_cmp (const char *s1, const char *s2) 854{ 855 unsigned char c1, c2; 856 857 do 858 { 859 c1 = (unsigned char) *s1++; 860 if (c1 == ',') 861 c1 = '\0'; 862 c2 = (unsigned char) *s2++; 863 if (c2 == ',') 864 c2 = '\0'; 865 if (c1 == '\0') 866 return c1 - c2; 867 } 868 while (c1 == c2); 869 870 return c1 - c2; 871} 872 873void 874opcodes_assert (const char *file, int line) 875{ 876 opcodes_error_handler (_("assertion fail %s:%d"), file, line); 877 opcodes_error_handler (_("Please report this bug")); 878 abort (); 879} 880 881/* Set the stream, and the styled and unstyled printf functions within 882 INFO. */ 883 884void 885disassemble_set_printf (struct disassemble_info *info, void *stream, 886 fprintf_ftype unstyled_printf, 887 fprintf_styled_ftype styled_printf) 888{ 889 info->stream = stream; 890 info->fprintf_func = unstyled_printf; 891 info->fprintf_styled_func = styled_printf; 892} 893